search for: mcinst

...: invalid operand for instruction         gslbx           $2,0($3,$4)                                       ^ Compare with Loongson GCC toolchain: .text gs:     .set    noat     gslble    $2, $3, $4              # encoding: [0x10,0x20,0x62,0xc8]                                         # <MCInst #1546 GSLBLE                                         #  <MCOperand Reg:321>                                         #  <MCOperand Reg:322>                                         #  <MCOperand Reg:22>>     gslbgt    $5, $6, $7              # encoding: [0x11,0x38,0xc5,0xc8]...

Can someone explain what MCInst is vs. MachineIntr? I'm porting some patches we have here that affect MachineInstrs and am wondering whether I need to make similar changes in MCInst. Why do we have two machine instruction representations? -Dave

On Jul 9, 2009, at 5:34 PM, David Greene wrote: > Can someone explain what MCInst is vs. MachineIntr? Sure. MCInst is designed to be part of the "MC" set of libraries, which is stuff dealing with machine code. We're building a suite of assemblers and disassemblers out of this. MCInst is integral to this plan. For an assembler you have two pieces: 1. &quot...

On Friday 10 July 2009 00:19, Chris Lattner wrote: > asmprinter::printInstruction will lower a MachineInstr to an MCInst, > then call the MCInst asmprinter to do the hard formatting work. You > can see a horrible simple skeleton of this idea in > X86ATTAsmPrinter::printMachineInstruction. Yep, that's where I hit the problem. I'm patching the sources for the comment emitter and of course MCInst doe...

Dear All, I am following a flow to generate object files(.o) from input (.s assembly) files. The input .s is given to AsmParser, which creates MCInst after matching instruction opcode. These MCInst are converted to MCStream and then finally emitting to an object file using Target Code Emitter. I am considering whether hazard recognition can be done on the list of MCInst, which I get after parsing .s file ?? The hazard recognition available wi...

Hi, Dear LLVM Dev Group, I am doing an LLVM project aimed to disassemble an ARM ELF binary executable to the MCInst format, inserting some instructions or doing some modification, and re-assemble the MCInst to an ELF binary. As I used the llvm-mc, it seems to only have the option "llvm-mc -disassemble", which reads strings and output strings. Is there any command or function that can take a binary, an...

Hi all. I'm looking for some way to do code analysis with LLVM. Can someone please give me a hint, if it is possible to query an MCInst for what are input operands and what are output operands? Small example. Consider we have an instruction: str r1, [sp, #8] Being mapped into MCInst instance it has the following operands: <MCOperand Reg:61> <-- maps to reg r1 <MCOperand Reg:105> <-- maps to reg sp...

Hello Owen, > There should already be sufficient support for what you're trying to do. See > MCOperand::CreateInst(). The concept is that you'll build a composite MCInst in > your AsmPrinter::EmitInstruction() method, which uses Inst-type MCOperands to > hold a list of sub-instructions. Then you call AsmStreamer::EmitInstruction() on the > composite MCInst. Thanks for your reply. This is actually one approach we are considering, but there are a few issue...

...for a VLIW target, and some of the optimizing our assembler needs to do must be done on a per-packet basis. This requires us to be able to traverse instruction within a packet, and one particular optimization requires traversal of previous packets as well. We're considering adding support for MCInst bundles in the MC layer to accommodate this use case, analogous to what currently exists for MachineInstr. Has anyone given thought to this before? Is there already a way to create bundles in the MC layer that we've overlooked? Any comments or suggestions are appreciated. Thanks,

...me of the > optimizing our assembler needs to do must be done on a per-packet basis. > This requires us to be able to traverse instruction within a packet, and one > particular optimization requires traversal of previous packets as well. > > We're considering adding support for MCInst bundles in the MC layer to > accommodate this use case, analogous to what currently exists for > MachineInstr. Has anyone given thought to this before? Is there already a > way to create bundles in the MC layer that we've overlooked? There should already be sufficient support for wha...

Mario, On Nov 29, 2012, at 4:04 PM, Mario Guerra <mariog at codeaurora.org> wrote: > Thanks for your reply. This is actually one approach we are considering, but > there are a few issues with it we weren't sure how to address. > > One is that the lifespan of an MCInst seems to be limited to the scope of > AsmPrinter, and we need them to be persistent in order to do a traversal for > branch relaxation and fetch boundary alignment optimizations. This is no different than any other MCInst in the course of object emission. Normal MCInst's are allocated o...

In r198030 the last in tree backend was converted to use MCInst for printing assembly. I removed support for the old printer in r198959. Out of tree targets have to lower MachineInstr to MCInst to use the new printer. Cheers, Rafael

Cool. I've almost done the disassembly part. Any hint on how to translate from MCInst to ELF binary? E.g., which LLVM tool to use? I only find tools effective on LLVM Bitcode. Thanks so much again. On Wed, Sep 18, 2013 at 7:48 PM, James Courtier-Dutton < james.dutton at gmail.com> wrote: > How about: > http://blog.llvm.org/2010/01/x86-disassembler.html > > This...

The MCInstrDesc has a method getNumDefs() which tells you how many 'out registers' that MCInst has. The 'out' registers are always at the beginning of the list. You can also use getNumOperands(). Not sure if this is what you are looking for. -----Original Message----- From: llvmdev-bounces...

Hi, By way of example, I have the following instruction: 44 8b 80 c8 03 00 00 movl 968(%rax), %r8d 1) How is this represented in MCInst? 2) Is there information in MCInst that would tell me which bytes of the instruction are responsible for the 968? The reason I am asking is that I want to work with the bytes disassembled/decoded to an instruction at MCInst level. I then wish to apply customized relocation records at the MCInst le...

...nu/libc.so.6+0x2dbd7) #8 0x00007fcc8e676c82 (/lib/x86_64-linux-gnu/libc.so.6+0x2dc82) #9 0x00000000016b63bb llvm::SmallVectorTemplateCommon<llvm::MCOperand, void>::operator[](unsigned long) const /home/shenyouren/workspace/llvm/include/llvm/ADT/SmallVector.h:154:0 #10 0x00000000016b63bb llvm::MCInst::getOperand(unsigned int) const /home/shenyouren/workspace/llvm/include/llvm/MC/MCInst.h:182:0 #11 0x00000000026695fd llvm::X86ATTInstPrinter::printOperand(llvm::MCInst const*, unsigned int, llvm::raw_ostream&) /home/shenyouren/workspace/llvm/lib/Target/X86/InstPrinter/X86ATTInstPrinter.cpp:185...

...ample: The internal "-mllvm -show-mc-inst" option is probably as close as you can get. $ clang -S -O0 test.c -mllvm -show-mc-inst -o - _test: ## @test .cfi_startproc ## BB#0: ## %entry pushq %rbp ## <MCInst #2120 PUSH64r ## <MCOperand Reg:106>> Ltmp2: .cfi_def_cfa_offset 16 Ltmp3: .cfi_offset %rbp, -16 movq %rsp, %rbp ## <MCInst #1491 MOV64rr ## <MCOperand Reg:106>...

...es only unexpanded pseudos as input, which fails. So, my target must generate .s files and assemble as a separate step. If a target could pass an assembly string to the integrated assembler, the pseudo problem goes away. The string passed to the integrated assembler could come wrapped in a pseudo MCInst or whatever. Support for asm string parsing already exists in every target, so this doesn't seem like much of a stretch. Thanks for any comments on this idea. Regards, -steve

Hi, I have a question regarding each MCInst. When converting from MCInst to encoded machine code octets, is it possible for an MCInst to produce more than one different set of octets depending on the operands being different? I.e. is there a one to one relationship between MCInst and the encoded machine code bytes? Kind Regards James -----...

...a _sigtramp + 26 4 libsystem_platform.dylib 0x0000000000000002 _sigtramp + 2032693506 5 llvm-mc 0x00000001096a5836 abort + 22 6 llvm-mc 0x00000001096a5811 __assert_rtn + 81 7 llvm-mc 0x000000010963f4e8 llvm::SparcInstPrinter::printOperand(llvm::MCInst const*, int, llvm::MCSubtargetInfo const&, llvm::raw_ostream&) + 136 8 llvm-mc 0x000000010963eae0 llvm::SparcInstPrinter::printInstruction(llvm::MCInst const*, llvm::MCSubtargetInfo const&, llvm::raw_ostream&) + 256 9 llvm-mc 0x000000010964f5e6 ll...