search for: mci_misc

Displaying 4 results from an estimated 4 matches for "mci_misc".

2010 Jun 22
4
New kernel causes hardware error?
...ntly upgraded to 2.6.18-194.3.1.el5 and within several days the machine crashed with the following error (repeating in mcelog): MCE 0 HARDWARE ERROR. This is *NOT* a software problem! Please contact your hardware vendor CPU 2 BANK 8 MISC 41 MCG status: MCi status: Error overflow Uncorrected error MCi_MISC register valid Processor context corrupt MCA: MEMORY CONTROLLER AC_CHANNEL0_ERR Transaction: Address/Command error Memory address parity error Memory corrected error count (CORE_ERR_CNT): 911 Memory transaction Tracker ID (RTId): 41 Memory DIMM ID of error: 0 Memory channel ID of error: 0 Memory EC...
2011 Mar 24
6
Kernel Panic on HP/Compaq ProLiant G7
Hello Everyone, I recently installed CentOS 5.5 x86_64 on a brand new ProLiant DL380 G7. I have identical OS software running reock-solid on two other DL380 ProLiant servers, but they are G6 models, not G7. On the G7, the installation went perfectly and the machine ran great for about 2 weeks, when it just seemed to "stop". The system stopped responding on the network, and there was
2011 Mar 21
1
Cant find out MCE reason (CPU 35 BANK 8)
...US cc0055000001009f MCGSTATUS 0 decode with mcelog --ascii --cpu p4(cause there is no xeon56xx in list): HARDWARE ERROR. This is *NOT* a software problem! Please contact your hardware vendor CPU 53 BANK 8 TSC 1982d8f72b1f MISC e1742eac00006242 ADDR 7ffd78a80 MCG status: MCi status: Error overflow MCi_MISC register valid MCi_ADDR register valid MCA: MEMORY CONTROLLER RD_CHANNELunspecified_ERR Transaction: Memory read error STATUS cc0002000001009f MCGSTATUS 0 The global question is it possible to find out the exact hw which causes those messages? First we thought that according to /* A machine check...
2007 May 29
24
RFC: MCA/MCE concept
Hello! The current MCA/MCE support in Xen is that it dumps the error and panics. In the following concept I propose here, there are two places where Xen has to react on. I) Xen receives a MCE from the CPU and II) Xen receives Dom0 instructions via Hypercall The term "self-healing" below is used in the sense of using the most propriate technique(s) to handle an error such as MPR