Displaying 4 results from an estimated 4 matches for "mc_bank".
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fcbank
2011 Jul 22
0
[PATCH] Dump mce log by ERST when mc panic
...rch/x86/cpu/mcheck/mce.c Mon Jul 18 21:40:28 2011 +0800
+++ b/xen/arch/x86/cpu/mcheck/mce.c Fri Jul 22 17:02:02 2011 +0800
@@ -919,6 +919,28 @@ void *x86_mcinfo_add(struct mc_info *mi,
return buf;
}
+static void x86_mcinfo_apei_save(
+ struct mcinfo_global *mc_global, struct mcinfo_bank *mc_bank)
+{
+ struct mce m;
+
+ memset(&m, 0, sizeof(struct mce));
+
+ m.cpu = mc_global->mc_coreid;
+ m.cpuvendor = boot_cpu_data.x86_vendor;
+ m.cpuid = cpuid_eax(1);
+ m.socketid = mc_global->mc_socketid;
+ m.apicid = mc_global->mc_apicid;
+
+ m.mcgstatus = mc_global...
2012 Jul 05
3
[PATCH] Xen/MCE: stick all 1's to MCi_CTL of vMCE
...*bank, struct domain *d)
{
- int bank_nr;
-
- if ( !bank || !d || !h_mci_ctrl )
+ if ( !bank || !d )
return 1;
/* Will MCE happen in host if If host mcg_ctl is 0? */
if ( ~d->arch.vmca_msrs->mcg_ctl & h_mcg_ctl )
return 1;
- bank_nr = bank->mc_bank;
- if (~d->arch.vmca_msrs->mci_ctl[bank_nr] & h_mci_ctrl[bank_nr] )
- return 1;
return 0;
}
diff -r 4f92bdf3370c xen/include/asm-x86/mce.h
--- a/xen/include/asm-x86/mce.h Wed Jun 27 09:36:43 2012 +0200
+++ b/xen/include/asm-x86/mce.h Fri Jul 06 10:05:46 2012 +0800
@@ -18...
2012 Sep 18
6
[PATCH 2/5] Xen/MCE: vMCE injection
Xen/MCE: vMCE injection
In our test for win8 guest mce, we find a bug that no matter what SRAO/SRAR
error xen inject to win8 guest, it always reboot.
The root cause is, current Xen vMCE logic inject vMCE# only to vcpu0, this is
not correct for Intel MCE (Under Intel arch, h/w generate MCE# to all CPUs).
This patch fix vMCE injection bug, injecting vMCE# to all vcpus.
Signed-off-by: Liu,
2007 May 29
24
RFC: MCA/MCE concept
Hello!
The current MCA/MCE support in Xen is that it dumps the error and panics.
In the following concept I propose here, there are two places where Xen has to
react on.
I) Xen receives a MCE from the CPU and
II) Xen receives Dom0 instructions via Hypercall
The term "self-healing" below is used in the sense of using the most propriate
technique(s) to handle an error such as MPR