Displaying 2 results from an estimated 2 matches for "mc1_status".
2013 Mar 12
14
vpmu=1 and running 'perf top' within a PVHVM guest eventually hangs dom0 and hypervisor has stuck vCPUS. Romley-EP (model=45, stepping=2)
...,c0000000, core=00000000,00000000,00000000,ffff0000
(XEN) run: [32767.31] pri=-64 flags=0 cpu=31
(XEN) irq.c:375: Dom1 callback via changed to Direct Vector 0xf3
(XEN) MCE: rd MCG_CAP 0x1000c02
(XEN) MCE: rd MCG_CAP 0x1000c02
(XEN) MCE: rd MCG_CAP 0x1000c02
(XEN) MCE: wr MC0_STATUS 0
(XEN) MCE: wr MC1_STATUS 0
(XEN) APIC error on CPU28: 00(40)
(XEN) APIC error on CPU28: 40(40)
(XEN) MCE: rd MCG_CAP 0x1000c02
(XEN) MCE: rd MCG_CAP 0x1000c02
(XEN) MCE: rd MCG_CAP 0x1000c02
(XEN) MCE: wr MC0_STATUS 0
(MCG_CAP 0x1000c02
(XEN) MCE: rd MCG_CAP 0x1000c02
(XEN) MCE: wr MC0_STATUS 0
(XEN) MCE: wr MC1_STATUS 0
(...
2009 Aug 28
64
[PATCH 2/2] graphics passthrough with VT-d
This patch supports basic gfx passthrough on QEMU:
- disable emulated VGA adpater if there is passthroughed gfx
- register/unregister legacy VGA I/O ports and MMIOs for passthroughed gfx
Signed-off-by: Ben Lin <ben.y.lin@intel.com>
Signed-off-by: Weidong Han <weidong.han@intel.com>
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