search for: mayreadfrommemory

...irst instructions which are not depending on others results. So far it seems to be working but i am missing instructions like: %tmp.1 = seteq int %argc, 2 ; <bool> [#uses=1] There seems only an function like llvm::Instruction::mayWriteToMemory but nothing like llvm::Instruction::mayReadFromMemory or s.t. with similiar functionality? Or else: if there is an even easier way to get the non data depending instruction from a block i missed, i would be also happy. Thanks S.T.

...which are not depending on others results. So > far it seems to be working but i am missing instructions like: > %tmp.1 = seteq int %argc, 2 ; <bool> [#uses=1] > There seems only an function like llvm::Instruction::mayWriteToMemory > but nothing like llvm::Instruction::mayReadFromMemory or s.t. with similiar > functionality? > > Or else: if there is an even easier way to get the non data depending > instruction from a block i missed, i would be also happy. I'm not sure what you're looking for. LLVM has effectively four types of instructions: 1. Instructions...

...ing on others results. > > So far it seems to be working but i am missing instructions like: > > %tmp.1 = seteq int %argc, 2 ; <bool> [#uses=1] > > There seems only an function like llvm::Instruction::mayWriteToMemory > > but nothing like llvm::Instruction::mayReadFromMemory or s.t. with > > similiar functionality? > > > > Or else: if there is an even easier way to get the non data depending > > instruction from a block i missed, i would be also happy. > > I'm not sure what you're looking for. Ok, i'll try to put it in differen...

...f the loop.  This means it is safe > to hoist >      // something that might trap, but isn't safe to hoist something > that reads >      // memory (without proving that the loop doesn't write). >      if (L->hasLoopInvariantOperands(Inst) && >          !Inst->mayReadFromMemory() && !Inst->mayWriteToMemory() && >          !isa<TerminatorInst>(Inst) && !isa<DbgInfoIntrinsic>(Inst)) { >        Inst->moveBefore(LoopEntryBranch); >        continue; >      } > > The above code happily moves an alloca instruction out o...

...ilder(MemI); Module *M = (*I)->getParent()->getParent(); Type *I32 = Type::getInt32Ty((*I)->getContext()); Value *PrefetchFunc = Intrinsic::getDeclaration(M, Intrinsic::prefetch); Builder.CreateCall4(PrefetchFunc, PrefPtrValue, ConstantInt::get(I32, MemI->mayReadFromMemory() ? 0 : 1), ConstantInt::get(I32, 3), ConstantInt::get(I32, 1)); -Hal ----- Original Message ----- > From: "Jimborean Alexandra" <xinfinity_a at yahoo.com> > To: llvmdev at cs.uiuc.edu > Sent: Wednesday, April 10, 2013 12:43:23 PM > Subject: [LLVMdev] How to c...

Hello, Can anyone please guide me how can I replace a load instruction with a prefetch. I was looking at the intrinsic creation methods of the IRBuilder, but I can only find functions corresponding to memset, memcpy and memmove intrinsics, not for prefetching. Also, I target x86-64 architectures. Is it sufficient to insert a call to the intrinsic in the LLVM IR to have the corresponding prefetch

...he face of PHI nodes. Also, be careful of side effects, both in the instructions you're comparing and in anything in between; for example you don't want two loads to be considered equal if there's a store to that memory in between them. Instruction::mayHaveSideEffects() and Instruction::mayReadFromMemory() are probably useful here. If you go with either of the last two options and create a function to figure out whether two values are equivalent, it might be interesting if you submitted a patch for your changes so others can use them too. Also, you'd likely get some feedback on whether you'...

...cuting in each iteration of the loop. This means it is safe to hoist // something that might trap, but isn't safe to hoist something that reads // memory (without proving that the loop doesn't write). if (L->hasLoopInvariantOperands(Inst) && !Inst->mayReadFromMemory() && !Inst->mayWriteToMemory() && !isa<TerminatorInst>(Inst) && !isa<DbgInfoIntrinsic>(Inst)) { Inst->moveBefore(LoopEntryBranch); continue; } The above code happily moves an alloca instruction out of the loop, to the new lo...

Hi Reid, Thank you for your response. In my analysis, I will always have entry(2) and exit(2). I will not run into cases involving entry (1+1) or entry (fn return values). I am having trouble trying to compare the arguments of entry and exit in the following scenario. #include<stdio.h> #include<stdlib.h> #include<pthread.h> struct sa { int a; pthread_mutex_t *mutex1;

Hi, I have two problems regarding the llvm.stackrestore intrinsic. I'm running on 3.0, but a quick test on trunk also showed the same behavior. First problem: --------------- I have code like: tmp1 = call llvm.stacksave() tmp2 = alloca [do some stuff with tmp2] call llvm.stackrestore(tmp1) [some other stuff] tmp3 = call llvm.stacksave() tmp4 = alloca [do some stuff

Hello, I'm working with a pass that operates at the LLVM IR level. I need to run some statistics on instructions that access memory, and I'm wondering, at the IR level, which instructions aside from Load and Store access memory directly as a result of their operation? I know on an ISA level, this varies from arch to arch, but I'm wondering how LLVM has this set up at the IR level.

...ople a chunk of code to read, but perhaps it will help. Thanks, Preston // iterate over instructions in block for (BasicBlock::iterator i = b->begin(), e = b->end(); i != e; ++i) { errs() << *i << "\n"; // look for loads and stores if (i->mayReadFromMemory() || i->mayWriteToMemory()) { // get dependence for this instruction MemDepResult d = MDA->getDependency(i); if (d.isClobber()) errs() << "clobber " << *(d.getInst()); if (d.isDef()) errs() << "def " << *(d.getInst()); if (d.isNonLocal()) {...

Hi, > On Apr 22, 2016, at 8:27 PM, Hal Finkel via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > Hi Rob, > > The problem here is that the d[i] array is only conditionally accessed, and so we can't if-convert the loop body. The compiler does not know that d[i] is actually dereferenceable for all i from 0 to 15 (the array might be shorter and p[i] is 0 for i past the end

Hi, A few days ago I stumbled upon a problem where SpeculativeExecution changed the order of a load and a store to the same address. I wrote https://bugs.llvm.org//show_bug.cgi?id=32964 about it but no response there so far. In the input we have store i8 0, i8* @i %.pre = load i8, i8* @i and then in the output the load is moved so it's before the store which clearly makes it

...gt; + if (I == v || > + (!FastDep&& users.count(v))) { Why a newline here? It should not break the 80 col limit. > + usesI = true; break; One instruction per line, please. > + } > + } > + if (!usesI&& J->mayReadFromMemory()) { > + for (AliasSetTracker::iterator i = writes.begin(), e = writes.end(); > + i != e; ++i) { > + for (AliasSet::iterator j = i->begin(), e2 = i->end(); > + j != e2; ++j) { > + AliasAnalysis::Location ptrLoc(j...

...s would have to generate good-enough annotations for loop transformations. Only the ones that do might enable loop optimization passes. Generally, I'd try to to make it easy for other front-end to have loop optimizations. For instance, avoid isa<LoadInst> in favor of a more generic "mayReadFromMemory" in analysis/transformation phases. Michael

...(!FastDep&& users.count(v))) { > > Why a newline here? It should not break the 80 col limit. > > > + usesI = true; break; > One instruction per line, please. > > > + } > > + } > > + if (!usesI&& J->mayReadFromMemory()) { > > + for (AliasSetTracker::iterator i = writes.begin(), e = writes.end(); > > + i != e; ++i) { > > + for (AliasSet::iterator j = i->begin(), e2 = i->end(); > > + j != e2; ++j) { > > + AliasAn...

Tobias, et al., Attached is the my autovectorization pass. I've fixed a bug that appears when using -bb-vectorize-aligned-only, fixed some 80-col violations, etc., and at least on x86_64, all test cases pass except for a few; and all of these failures look like instruction-selection bugs. For example: MultiSource/Applications/ClamAV - fails to compile shared_sha256.c with an error: error in

Am Sa., 11. Jan. 2020 um 07:43 Uhr schrieb Renato Golin <rengolin at gmail.com >: > On Sat, 11 Jan 2020 at 00:34, Michael Kruse <llvmdev at meinersbur.de> wrote: > > Yes, as mentioned in the Q&A. Unfortunately VPlan is able to represent > > arbitrary code not has cheap copies. > > Orthogonal, but we should also be looking into implementing the cheap > copies

Tobias, I've attached the latest version of my autovectorization patch. I was able to add support for using the ScalarEvolution analysis for load/store pairing (thanks for your help!). This led to a modest performance increase and a modest compile-time increase. This version also has a cutoff as you suggested (although the default value is set high (4000 instructions between pairs) because