search for: max_mhz

...DE_ENCODER_LVDS; break; > case DCB_OUTPUT_DP: > nv_encoder->dp.no_interlace = caps->sor[or].dp.no_interlace; > + type = DRM_MODE_ENCODER_TMDS; > + break; > case DCB_OUTPUT_TMDS: > + nv_encoder->tmds.max_mhz = caps->sor[or].tmds.max_mhz; > + type = DRM_MODE_ENCODER_TMDS; > + break; > default: > type = DRM_MODE_ENCODER_TMDS; > break; > diff --git a/drm/nouveau/nouveau_connector.c b/drm/nouveau/nouveau_connector.c &g...

...M_MODE_ENCODER_LVDS; break; > case DCB_OUTPUT_DP: > nv_encoder->dp.no_interlace = caps->dp[or].no_interlace; > + type = DRM_MODE_ENCODER_TMDS; > + break; > case DCB_OUTPUT_TMDS: > + nv_encoder->tmds.max_mhz = caps->tmds[or].max_mhz; > + type = DRM_MODE_ENCODER_TMDS; > + break; > default: > type = DRM_MODE_ENCODER_TMDS; > break; > diff --git a/drm/nouveau/nouveau_connector.c b/drm/nouveau/nouveau_connector.c > i...

small update to my last version I sent out. Patches 3-6 are optional and should only improve detecting the max clocks for HDMI and DP, but they didn't underwent big testing and I am a bit concerned, that it might break detecting the DP limits on some boards. Karol Herbst (6): kms/nv50: move nv50_mstm out of the dp union in nouveau_encoder kms/nv50: reject interlaced modes if the hardware

This is mainly for dropping interlaced modes on DP connectors if the GPU would otherwise display garbage or EVO timesout. It also adds experimental detection of the HDMI clock limit we currently hard limit depending on the GPU generation. Starting with GF110 GPUs, we can retrieve the limit directly from the GPU and may make the hdmimhz parameter obsolete. Testing this series with 2560x1440 or

...>> case DCB_OUTPUT_DP: >> nv_encoder->dp.no_interlace = caps->sor[or].dp.no_interlace; >> + type = DRM_MODE_ENCODER_TMDS; >> + break; >> case DCB_OUTPUT_TMDS: >> + nv_encoder->tmds.max_mhz = caps->sor[or].tmds.max_mhz; >> + type = DRM_MODE_ENCODER_TMDS; >> + break; >> default: >> type = DRM_MODE_ENCODER_TMDS; >> break; >> diff --git a/drm/nouveau/nouveau_connector.c b/drm/nouvea...

...te(struct drm_connector *connector, struct dcb_output *dcbe, case DCB_OUTPUT_LVDS: type = DRM_MODE_ENCODER_LVDS; break; case DCB_OUTPUT_DP: nv_encoder->dp.no_interlace = caps->dp[or].no_interlace; + type = DRM_MODE_ENCODER_TMDS; + break; case DCB_OUTPUT_TMDS: + nv_encoder->tmds.max_mhz = caps->tmds[or].max_mhz; + type = DRM_MODE_ENCODER_TMDS; + break; default: type = DRM_MODE_ENCODER_TMDS; break; diff --git a/drm/nouveau/nouveau_connector.c b/drm/nouveau/nouveau_connector.c index 074e6d52..a955f225 100644 --- a/drm/nouveau/nouveau_connector.c +++ b/drm/nouveau/nouvea...

...truct drm_connector *connector, struct dcb_output *dcbe, case DCB_OUTPUT_LVDS: type = DRM_MODE_ENCODER_LVDS; break; case DCB_OUTPUT_DP: nv_encoder->dp.no_interlace = caps->sor[or].dp.no_interlace; + type = DRM_MODE_ENCODER_TMDS; + break; case DCB_OUTPUT_TMDS: + nv_encoder->tmds.max_mhz = caps->sor[or].tmds.max_mhz; + type = DRM_MODE_ENCODER_TMDS; + break; default: type = DRM_MODE_ENCODER_TMDS; break; diff --git a/drm/nouveau/nouveau_connector.c b/drm/nouveau/nouveau_connector.c index 074e6d52..65fac604 100644 --- a/drm/nouveau/nouveau_connector.c +++ b/drm/nouveau/no...

...et; + + ret = nvif_mthd(ctrl, NVIF_CONTROL_BOOST_INFO, &info, sizeof(info)); + if (ret) + return ret; + + nouveau_debugfs_boost_get_entry(m, info.mode, 0, info.base_mhz); + nouveau_debugfs_boost_get_entry(m, info.mode, 1, info.boost_mhz); + nouveau_debugfs_boost_get_entry(m, info.mode, 2, info.max_mhz); + return 0; +} + +static ssize_t +nouveau_debugfs_boost_set(struct file *file, const char __user *ubuf, + size_t len, loff_t *offp) +{ + struct seq_file *m = file->private_data; + struct drm_info_node *node = (struct drm_info_node *) m->private; + struct nouveau_debugfs *debugfs = nouve...

This series fixes most of the issues regarding volting on GPUs with any form of GPU Boost inside their vbios, which is mainly Kepler and newer, but we find some boosting related tables in Fermi vbios' already In the end reclocking should work on most Kepler cards without any issues v2: boost_mode can now be changed at runtime minor fixups Karol Herbst (22): bios/volt: handle voltage

This is an updated series for the old clocking improvement one. I think I got everything needed in place and also a simple update mechanism for updating the cstates/voltage on temperature changes. If anything is unclear how I REed or got the information, please leave a note so that I can provide additional information in the commits. Besides that I think we are pretty close now and only some

Just wanted to post updated versions of my last series/patches. Reviews welcomed. It would be also nice if we agree on features I should focus upstreaming, so that this work can be better splitted or reordered. Sadly most of my patches depend on the rather big clk subdev rework and I think those patches shows best, why I think this rework is actually needed and makes things much easier to add

Last update here: https://lists.freedesktop.org/archives/nouveau/2017-September/028848.html Basically big cleanup, reordering, simplifications and some renaming to make the code easier to read and to review. I also moved some bugfixes to the front so they can be merged prior the other patches. There was also a bug related to the therm daemon triggering a pstate change leading to PMU lockups,

We are slowly getting there! v4 of the series with some realy good improvements, so I am sure this is like 95% done and only needs some proper polishing and proper Reviews! I also added the NvVoltOffsetmV module parameter, so that a user is able to over and !under!-volt the GPU. Overvolting makes sense, when there are still some reclocking issues left, which might be solved by a higher voltage.