search for: max_access_size

Displaying 9 results from an estimated 9 matches for "max_access_size".

2012 Oct 08
21
[PATCH 00/14] Remove old_portio users for memory region PIO mapping
When running on PowerPC, we don''t have native PIO support. There are a few hacks around to enable PIO access on PowerPC nevertheless. The most typical one is the isa-mmio device. It takes MMIO requests and converts them to PIO requests on the (QEMU internal) PIO bus. This however is not how real hardware works and it limits us in the ability to spawn eventfd''s on PIO ports
2013 Jan 15
1
[PATCH 2/3] xen_platform: Do not use old_portio-style callbacks
...{ 0, 0x100, 1, .write = xen_platform_ioport_writeb, }, - PORTIO_END_OF_LIST() -}; - static const MemoryRegionOps xen_pci_io_ops = { - .old_portio = xen_pci_portio, + .read = xen_platform_ioport_readb, + .write = xen_platform_ioport_writeb, + .impl.min_access_size = 1, + .impl.max_access_size = 1, }; static void platform_ioport_bar_setup(PCIXenPlatformState *d) -- 1.7.10.4
2013 May 28
3
[PATCH RFC] virtio-pci: new config layout: using memory BAR
...t MemoryRegionOps virtio_pci_config_ops = { .endianness = DEVICE_LITTLE_ENDIAN, }; +static const MemoryRegionOps virtio_pci_config_common_ops = { + .read = virtio_pci_config_common_read, + .write = virtio_pci_config_common_write, + .impl = { + .min_access_size = 1, + .max_access_size = 4, + }, + .endianness = DEVICE_LITTLE_ENDIAN, +}; + +static const MemoryRegionOps virtio_pci_config_isr_ops = { + .read = virtio_pci_config_isr_read, + .write = virtio_pci_config_isr_write, + .impl = { + .min_access_size = 1, + .max_access_size = 1, + }, + .endi...
2013 May 28
3
[PATCH RFC] virtio-pci: new config layout: using memory BAR
...t MemoryRegionOps virtio_pci_config_ops = { .endianness = DEVICE_LITTLE_ENDIAN, }; +static const MemoryRegionOps virtio_pci_config_common_ops = { + .read = virtio_pci_config_common_read, + .write = virtio_pci_config_common_write, + .impl = { + .min_access_size = 1, + .max_access_size = 4, + }, + .endianness = DEVICE_LITTLE_ENDIAN, +}; + +static const MemoryRegionOps virtio_pci_config_isr_ops = { + .read = virtio_pci_config_isr_read, + .write = virtio_pci_config_isr_write, + .impl = { + .min_access_size = 1, + .max_access_size = 1, + }, + .endi...
2013 May 28
0
[PATCH RFC] virtio-pci: new config layout: using memory BAR
...gt; .endianness = DEVICE_LITTLE_ENDIAN, > }; > > +static const MemoryRegionOps virtio_pci_config_common_ops = { > + .read = virtio_pci_config_common_read, > + .write = virtio_pci_config_common_write, > + .impl = { > + .min_access_size = 1, > + .max_access_size = 4, > + }, > + .endianness = DEVICE_LITTLE_ENDIAN, > +}; > + > +static const MemoryRegionOps virtio_pci_config_isr_ops = { > + .read = virtio_pci_config_isr_read, > + .write = virtio_pci_config_isr_write, > + .impl = { > + .min_access_size = 1, >...
2020 Mar 02
2
[PATCH] drm/bochs: Remove vga write
...t; +static void dummy_write(void *ptr, hwaddr addr, > + uint64_t val, unsigned size) > +{ > +} > + > +static const MemoryRegionOps dummy_ops = { > + .read = dummy_read, > + .write = dummy_write, > + .valid.min_access_size = 1, > + .valid.max_access_size = 4, > + .impl.min_access_size = 1, > + .impl.max_access_size = 1, > + .endianness = DEVICE_LITTLE_ENDIAN, > +}; > + > static int bochs_display_get_mode(BochsDisplayState *s, > BochsDisplayMode *mode) > { > @@ -284,8 +304,8 @...
2020 Mar 02
2
[PATCH] drm/bochs: Remove vga write
...t; +static void dummy_write(void *ptr, hwaddr addr, > + uint64_t val, unsigned size) > +{ > +} > + > +static const MemoryRegionOps dummy_ops = { > + .read = dummy_read, > + .write = dummy_write, > + .valid.min_access_size = 1, > + .valid.max_access_size = 4, > + .impl.min_access_size = 1, > + .impl.max_access_size = 1, > + .endianness = DEVICE_LITTLE_ENDIAN, > +}; > + > static int bochs_display_get_mode(BochsDisplayState *s, > BochsDisplayMode *mode) > { > @@ -284,8 +304,8 @...
2015 Oct 26
9
[PATCH 0/7] Hyper-V Synthetic interrupt controller
Hyper-V SynIC (synthetic interrupt controller) device implementation. The implementation contains: * msr's support * irq routing setup * irq injection * irq ack callback registration * event/message pages changes tracking at Hyper-V exit * Hyper-V test device to test SynIC by kvm-unit-tests Andrey Smetanin (7): standard-headers/x86: add Hyper-V SynIC constants target-i386/kvm: Hyper-V
2015 Oct 26
9
[PATCH 0/7] Hyper-V Synthetic interrupt controller
Hyper-V SynIC (synthetic interrupt controller) device implementation. The implementation contains: * msr's support * irq routing setup * irq injection * irq ack callback registration * event/message pages changes tracking at Hyper-V exit * Hyper-V test device to test SynIC by kvm-unit-tests Andrey Smetanin (7): standard-headers/x86: add Hyper-V SynIC constants target-i386/kvm: Hyper-V