search for: mattr

Hi, When setting -mattr option on X86, I would like to treat MMX separately from SSE levels. This would allow a client who sets the attributes directly to set the SSE level independent of MMX, e.g., llc -march=x86 -mattr=sse41, one would get sse4.1 with mmx disabled while llc -march=x86 -mattr=mmx -mattr=sse42 wil...

Might you instead consider just adding a -disable-mmx option? Preston On Thu, 2008-20-11 at 02:57 -0500, Mon Ping Wang wrote: > Hi, > > When setting -mattr option on X86, I would like to treat MMX > separately from SSE levels. This would allow a client who sets the > attributes directly to set the SSE level independent of MMX, e.g., llc > -march=x86 -mattr=sse41, one would get sse4.1 with mmx disabled while > llc -march=x86 -mattr=mmx -mat...

On Nov 19, 2008, at 11:57 PMPST, Mon Ping Wang wrote: > Hi, > > When setting -mattr option on X86, I would like to treat MMX > separately from SSE levels. This would allow a client who sets the > attributes directly to set the SSE level independent of MMX, e.g., llc > -march=x86 -mattr=sse41, one would get sse4.1 with mmx disabled while > llc -march=x86 -mattr=mmx -mat...

Hi Dale, I will not change the default. I would dislike to see any regressions due to this type of change. -- Mon Ping On Nov 20, 2008, at 10:12 AM, Dale Johannesen wrote: > > On Nov 19, 2008, at 11:57 PMPST, Mon Ping Wang wrote: > >> Hi, >> >> When setting -mattr option on X86, I would like to treat MMX >> separately from SSE levels. This would allow a client who sets the >> attributes directly to set the SSE level independent of MMX, e.g., >> llc >> -march=x86 -mattr=sse41, one would get sse4.1 with mmx disabled while >> llc...

...ion? I agree, this is a better approach. This distinguishes between capabilities of the chip and the desire to codegen specific vectors one way or another. -Chris > > Preston > > On Thu, 2008-20-11 at 02:57 -0500, Mon Ping Wang wrote: >> Hi, >> >> When setting -mattr option on X86, I would like to treat MMX >> separately from SSE levels. This would allow a client who sets the >> attributes directly to set the SSE level independent of MMX, e.g., >> llc >> -march=x86 -mattr=sse41, one would get sse4.1 with mmx disabled while >> llc...

...generate interrupts which will > lead to a SIGFPE signal which terminates the program (unless caught by a > SIGFPE handler). > """ I don't see what this has to do with anything, but... > Is there a way I can disable SSE instruction generation in LLVM ? Yes. Pass -mattr=-sse1,-sse2,-sse3 to lli or llc. If you've linked the JIT into your app, you can specify this by calling cl::ParseCommandLineOptions on an static array, something like: int argc; char *Args[] = { "", "-mattr=-sse1,-sse2,-sse3", 0 }; cl::ParseCommandLineOptions(argc, Args,...

...OCRF, FeatureFSqrt, FeatureSTFIWX, > > FeatureISEL, Feature64Bit /*, Feature64BitRegs > > */]>; > > > > During compilation the subtarget class (such as PPCSubtarget) is > > instantiated with the strings obtained from -mcpu and -mattr. > > ParseSubtargetFeatures then uses the -mcpu and -mattr values to > > determine which features to use for code generation. > > > > What seems problematic is that -mattr is the only way that the static > > features of the target processor can be overridden. > &gt...

...> FeatureISEL, Feature64Bit /*, Feature64BitRegs > > > > */]>; > > > > > > > > During compilation the subtarget class (such as PPCSubtarget) is > > > > instantiated with the strings obtained from -mcpu and -mattr. > > > > ParseSubtargetFeatures then uses the -mcpu and -mattr values to > > > > determine which features to use for code generation. > > > > > > > > What seems problematic is that -mattr is the only way that the static > > > > features o...

...reSTFIWX, > > > FeatureISEL, Feature64Bit /*, Feature64BitRegs > > > */]>; > > > > > > During compilation the subtarget class (such as PPCSubtarget) is > > > instantiated with the strings obtained from -mcpu and -mattr. > > > ParseSubtargetFeatures then uses the -mcpu and -mattr values to > > > determine which features to use for code generation. > > > > > > What seems problematic is that -mattr is the only way that the static > > > features of the target processor ca...

Hi, I’ve run into a case where `llc -mattr=+soft-float` for "armv7-unknown-linux-androideabi” segfaults, while `llc -float-abi=soft` does not. Similarly if the "target-features"="+soft-float” metadata is embedded, llc segfaults. I fear I’m missing something rather subtle here, could someone help me understand the diffe...

Hi Moritz, On 26 September 2017 at 09:09, Moritz Angermann via llvm-dev <llvm-dev at lists.llvm.org> wrote: > I’ve run into a case where `llc -mattr=+soft-float` for > "armv7-unknown-linux-androideabi” segfaults, while > `llc -float-abi=soft` does not. Similarly if the > "target-features"="+soft-float” metadata is embedded, > llc segfaults. The float-abi option specifies which registers should be used to pass f...

...FeatureISEL, Feature64Bit /*, Feature64BitRegs > > > > > */]>; > > > > > > > > > > During compilation the subtarget class (such as PPCSubtarget) is > > > > > instantiated with the strings obtained from -mcpu and -mattr. > > > > > ParseSubtargetFeatures then uses the -mcpu and -mattr values to > > > > > determine which features to use for code generation. > > > > > > > > > > What seems problematic is that -mattr is the only way that the static > >...

On Wed, 19 Apr 2006 18:21:32 -0500 (CDT) Chris Lattner <sabre at nondot.org> wrote: > > > I don't see what this has to do with anything, but... Me neither. > > > Is there a way I can disable SSE instruction generation in LLVM ? > > Yes. Pass -mattr=-sse1,-sse2,-sse3 to lli or llc. Right, that fixed it. BTW: from the --help: -mattr=<a1,+a2,-a3,...> - Target specific attributes (-mattr=help for details) -mcpu=<cpu-name> - Target a specific cpu type (-mcpu=help for details) but -mattr=help doesn't do anyt...

Hi Tim, Ohh, I completely forgot to attach the source. Running this with: $ llc -O2 -mcpu=generic HeapStackCheck.ll -mattr=+soft-float -o HeapStackCheck.s results in 0 llc 0x000000010fea65e6 llvm::sys::PrintStackTrace(llvm::raw_ostream&) + 37 1 llc 0x000000010fea5b3a llvm::sys::RunSignalHandlers() + 83 2 llc 0x000000010fea69d6 SignalHandler(int) +...

Hello, I'm trying to convince llc to compile into thumb2 ISA on ARMv7. I'm using: -march=thumb -mattr=v7,thumb2,vfp3 but llc complains about this with: llc: error: invalid target 'thumb -mattr=v7,thumb2,vfp3' I'm using LLVM from Aug 29 2011. To me the set of options looks sane so I'd like to ask what's wrong with this. Thanks! Karel

...[DirectivePwr7, FeatureAltivec, FeatureMFOCRF, FeatureFSqrt, FeatureSTFIWX, FeatureISEL, Feature64Bit /*, Feature64BitRegs */]>; During compilation the subtarget class (such as PPCSubtarget) is instantiated with the strings obtained from -mcpu and -mattr. ParseSubtargetFeatures then uses the -mcpu and -mattr values to determine which features to use for code generation. What seems problematic is that -mattr is the only way that the static features of the target processor can be overridden. It seems there must be a way for command-line parameters...

...FeatureMFOCRF, FeatureFSqrt, FeatureSTFIWX, > FeatureISEL, Feature64Bit /*, Feature64BitRegs > */]>; > > During compilation the subtarget class (such as PPCSubtarget) is > instantiated with the strings obtained from -mcpu and -mattr. > ParseSubtargetFeatures then uses the -mcpu and -mattr values to > determine which features to use for code generation. > > What seems problematic is that -mattr is the only way that the static > features of the target processor can be overridden. > > It seems there must be...

...799 #1667 -------------- next part -------------- Index: test/CodeGen/PTX/options.ll =================================================================== --- test/CodeGen/PTX/options.ll (revision 130978) +++ test/CodeGen/PTX/options.ll (working copy) @@ -1,6 +1,7 @@ ; RUN: llc < %s -march=ptx32 -mattr=ptx20 | grep ".version 2.0" ; RUN: llc < %s -march=ptx32 -mattr=ptx21 | grep ".version 2.1" ; RUN: llc < %s -march=ptx32 -mattr=ptx22 | grep ".version 2.2" +; RUN: llc < %s -march=ptx32 -mattr=ptx23 | grep ".version 2.3" ; RUN: llc < %s -march=...

Hi Karel, It actually looks like the argument parser has parsed "thumb -mattr=v7,thumb2,vfp3" as the full argument to "-march=". Strange. The easiest way to get what you want is probably "-mtriple thumbv7--". v7 has Thumb2 enabled and VFPv3 (along with NEON) by default. Cheers, James ________________________________________ From: llvmdev-bounces a...

I am using llvm-project compiling risc-v programs. llvm-project version:dd8a2013dc1804be1b7d9cffacad2e984300bd22 Instructons to build LLVM+clang: ``` cmake -G Ninja -DCMAKE_INSTALL_PREFIX=/home/llvm/workspace/llvm/llvm-project/llvm_install -DCMAKE_BUILD_TYPE="Release" -DDEFAULT_SYSROOT="/home/llvm/workspace/riscv/riscv-tc-20200220/bin/riscv32-unknown-elf"