Displaying 4 results from an estimated 4 matches for "matchtable".
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matchable
2012 May 22
2
[LLVMdev] Match operands
...let DecoderNamespace = "Mips64";
}
}
defm CEIL_W : FFR1_W_M<0xe, "ceil">;
defm CEIL_L : FFR1_L_M<0xa, "ceil">;
When assembly matcher is generated these are created as five instructions, each having 'ceil' as mnemonic:
static const MatchEntry MatchTable[277] = {
.
.
.
{ Mips::CEIL_L_D64, 93 /* ceil */, Convert__Reg1_2__Reg1_3, { MCK__DOT_l, MCK__DOT_d, MCK_FGR64, MCK_FGR64 }, Feature_IsFP64bit, 0},
{ Mips::CEIL_L_S, 93 /* ceil */, Convert__Reg1_2__Reg1_3, { MCK__DOT_l, MCK__DOT_s, MCK_FGR64, MCK_FGR32 }, Feature_IsFP64bit, 0},
{ Mips::CEIL_W...
2012 May 22
0
[LLVMdev] Match operands
...gt; }
> }
>
> defm CEIL_W : FFR1_W_M<0xe, "ceil">;
> defm CEIL_L : FFR1_L_M<0xa, "ceil">;
>
> When assembly matcher is generated these are created as five instructions, each having 'ceil' as mnemonic:
>
> static const MatchEntry MatchTable[277] = {
> .
> .
> .
>
> { Mips::CEIL_L_D64, 93 /* ceil */, Convert__Reg1_2__Reg1_3, { MCK__DOT_l, MCK__DOT_d, MCK_FGR64, MCK_FGR64 }, Feature_IsFP64bit, 0},
> { Mips::CEIL_L_S, 93 /* ceil */, Convert__Reg1_2__Reg1_3, { MCK__DOT_l, MCK__DOT_s, MCK_FGR64, MCK_FGR32 }, Feature_I...
2012 Feb 17
0
[LLVMdev] ARM/Thumb2/ISEL Need help tracing down a failing match: (HOW?)
...custom code..)
Assuming that the case is the first or second, what is the best way to
associate the table information in ARMGenDAGISel.inc to the entries in the
.td file? That is, while stepping through SelectCodeCommon(), I am having a
difficult time associating the MatchIndex and the associated MatchTable to
the entries in the .td.... Any pointers or help would be greatly
appreciated.
Thank you!
-jason
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2017 Feb 04
2
How to get assembly opcode mnemonic(s) corresponding to a MachineInstr?
Hi,
I'd like to modify MachineBasicBlock contents within a
MachineFunctionPass on the basis of how many CPU cycles the assembly
instructions corresponding to the MBB take. I'm using the AVR backend
and the number of CPU cycles every AVR assembly operation takes is
openly available.
Is there any straightforward way of getting the opcode mnemonics
corresponding to a MachineInstr? I've