search for: matchables

Displaying 20 results from an estimated 25 matches for "matchables".

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2018 Jan 08
0
about AsmMatcherEmitter rules for setting matchables precedence
Hi, In AsmMatcherEmitter.cpp, the operator “<” for comparing matchables (MatchableInfo objects) only checks matches that require more features as the last rule. I would like to propose that we check for that rule earlier, in the case of unrelated UserClasses, before we decide to set precedence based on UserClass name. The motivation is that unrelated UserClasses se...
2017 Dec 15
2
InstAlias with tied operands - can it be supported?
Hello, InstAlias does not allow tied operands (repeated operands) in the asm string to be matched. It seems this situation is explicitly prevented in AsmMatcherEmitter.cpp: if (!Hack) PrintFatalError(TheDef->getLoc(), "ERROR: matchable with tied operand '" + Tok + "' can never be matched!");
2017 Dec 15
0
InstAlias with tied operands - can it be supported?
Hi, On Instructions you can use checkEarlyTargetMatchPredicate() to check that the operands are the same. There's an example of that in MipsAsmParser.cpp for DATI and DAHI. I can't think of a reason TableGen couldn't be made to allow this for InstAlias too. > On 15 Dec 2017, at 02:12, via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > Hello, > > InstAlias
2018 Jan 04
1
InstAlias with tied operands - can it be supported?
...mitter.cpp @@ -1526,7 +1526,7 @@ void AsmMatcherInfo::buildInfo() { II->initialize(*this, SingletonRegisters, Variant, HasMnemonicFirst); // Validate the alias definitions. - II->validate(CommentDelimiter, false); + II->validate(CommentDelimiter, true); Matchables.push_back(std::move(II)); } On 2017-12-15 03:40, Daniel Sanders wrote: > Hi, > > On Instructions you can use checkEarlyTargetMatchPredicate() to check > that the operands are the same. There's an example of that in > MipsAsmParser.cpp for DATI and DAHI. I can't thin...
2008 Dec 06
1
catching authentication failures with LDAP backend
Hi, we have recently been hit by a couple of brute force password attacks against dovecot. So what I want to do now is to add dovecot to fail2ban in order to block further attacks. However, I don't seem to be able to find out password verifification failures for our LDAP based user data. The only thing I see are loads of lines like these in the logfiles: -------CUT------- dovecot: Nov
2020 Nov 18
2
Complex proposal v3 + roundtable agenda
Krzysztof Parzyszek via llvm-dev <llvm-dev at lists.llvm.org> writes: > Examples of complex instructions? Sorry, I was referring specifically to this statement: >> Without intrinsics it may be hard to use such instructions especially >> because of the arithmetic simplifications. I was asking the question in the context of intrinsics vs. a first-class complex type.
2012 Oct 17
0
[LLVMdev] Hexagon Assembly parser question
...bstractly, by operator). That's pretty fundamental to how it works, so sticking with that would be good unless you want to write an entirely new algorithm. You could probably stick with the current basic stuff with some fiddling in tablegen where the asm string gets split apart when building up matchables to re-order things appropriately. Then your ParseInstruction() implementation would do similar tricks. The printer should "just work," thankfully. That said, you'll also likely have to do a bit of work in the generic AsmParser code, as it'll likely look at statements like these a...
2012 Oct 17
3
[LLVMdev] Hexagon Assembly parser question
Hi, I'm trying to enable the hexagon LLVM assembly parser. It seem like there is a lot of work that has been done to make this parsing straightforward. But.. Hexagon assembly does not follow the "Mnemonic Rx Rx ." format that is expected by the assembly parsing infrastructure, represented by: StringRef Mnemonic = ((ARMOperand*)Operands[0])->getToken(); This
2019 Feb 01
2
[RFC] Vector Predication
Hi, On 1/31/19 8:17 PM, Philip Reames wrote: > > On 1/31/19 11:03 AM, David Greene wrote: >> Philip Reames <listmail at philipreames.com> writes: >> >>> Question 1 - Why do we need separate mask and lengths? Can't the >>> length be easily folded into the mask operand? >>> >>> e.g. newmask = (<4 x i1>)((i4)%y & (1 <<
2020 Nov 18
0
Complex proposal v3 + roundtable agenda
I missed the proposal for a first-class complex type, so I was thinking about working directly on pairs of numbers. I still think that intrinsics are better than a complex type. Intrinsics can be type-agnostic (i.e. overloaded), which would allow them to operate on complex number with any underlying type. Most applications want floating-point values, but on Hexagon we may want to use int16.
2001 Jun 19
0
Question about command "multicomp"
Dear R-People I did some two way variance analysis and have now the following problem: I''d like to do some multiple Comparisons between different factor levels (two factors, each with some 5 or 6 levels), because there are some significant interactions between these two factors. In S-plus 5, there is the function "multicomp", but in R, there ist no matchable funktion, as far
2008 Oct 21
1
Generating 484 "Address Incomplete"
Hi, We are processing lots of calls and I want to filter these that have incomplete numbers sent with a proper SIP response. These numbers are not in the local dialplan by themselves, so I'm trying to find a way to generate 484 "Address Incomplete" SIP response based on the length of the extension called. Congestion response is too lossy of the original cause and doesn't
2005 Mar 01
2
Limit the total bytes transfered?
Has anyone got a method for limiting the total number of bytes transfered with rsync? I was thinking running with -n and then using the output to check how much will been transfered. I ask because a client had a broken filesystem that occasionally has 2T+ files on it (broken filesystem, so they weren't actually that big) but we happily ran up a huge b/w bill with rsync. -Mike
2014 Oct 25
2
[LLVMdev] Adding masked vector load and store intrinsics
> So %passthrough can *only* be undef or zeroinitializer? No, it can be any value including undef and zeroinitializer. We considered, while designing, zero and merge semantics and decided that merge semantics is better because it covers zero semantics if you use zeroinitializer in the %paththru. - Elena -----Original Message----- From: dag at cray.com [mailto:dag at cray.com] Sent:
2020 Nov 13
3
Complex proposal v3 + roundtable agenda
Krzysztof Parzyszek via llvm-dev <llvm-dev at lists.llvm.org> writes: > Some architectures have instructions that assist with complex > arithmetic. Without intrinsics it may be hard to use such > instructions especially because of the arithmetic simplifications. > Perhaps, depending on TTI, those intrinsics could be expanded into the > explicit arithmetic? Can you provide
1997 Dec 04
11
/etc/passwd - Domain Controller Synchronization
Hello, I don't know much about Samba so forgive me if this is a stupid question. I'm currently working on a project for a client that relies on Unix machines for their main applications. Access to Unix applications is done through terminal emulation (vt 100) on Windows PCs. We are implementing a Windows NT network for file an print sharing and to support SMS. One of the goals of the
2014 Aug 01
2
[LLVMdev] BR_CC questions
I am implementing a new backend and am pretty sure I don't quite understand "the way" one is supposed to implement conditional branches. My target CPU natively supports a conditional branch instruction that accepts a condition to test (equal, less than, etc.), two operands (two registers, or one register and one immediate), and finally a target PC to branch to if the comparison
2014 Oct 24
2
[LLVMdev] Adding masked vector load and store intrinsics
> So %passthrough can *only* be undef or zeroinitializer? No, that wasn't the intent. %passthrough can be any other definition that is needed. Zero and undef were simply two possible values that illustrated some interesting behavior. Mapping of the %passthrough to the actual semantics of many vector instruction sets where the masked instructions leave the masked-off elements of the
2019 Jun 26
2
A libc in LLVM
On Jun 26, 2019, at 9:02 AM, Andrew Kelley via llvm-dev <llvm-dev at lists.llvm.org> wrote: > On 6/24/19 6:23 PM, Siva Chandra via llvm-dev wrote: >> Within Google, we have a growing range of needs that existing libc >> implementations don't quite address. >> To be very clear: we don't expect our needs to exactly match everyone >> else's -- part of our
2011 Apr 09
0
[LLVMdev] Long-Term ISel Design
On Mar 27, 2011, at 1:16 PM, David A. Greene wrote: > Chris Lattner <clattner at apple.com> writes: > >>> We would still keep the existing pre-table-driven-isel passes so we'd >>> still have a chance to do some cleanup before the main table-driven >>> isel. >>> >>> Obviously a lot of details have to be worked out. >> >>