Displaying 3 results from an estimated 3 matches for "maspar".
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aspar
2011 Feb 14
0
[LLVMdev] LLVMdev Digest, Vol 80, Issue 13
...> data that the SPARC-VIS, the PPC-Altivec, and the Intel-mmx/sse
> (among others) instruction
> sets support.
>
> As far as I am aware not a single one of any of the above types of
> instruction sets allows the "subscripting" of packed data within a
> register (the Maspar
> computer had hardware that would allow subscripting of sub-elements
> of data within
> a larger/wider register, but it was the exception, not the rule, and
> it did not support
> any of the saturating arithmetic that is part-and-parcel of the
> packed data types in
> the curr...
2011 Feb 14
8
[LLVMdev] LLVMdev Digest, Vol 80, Issue 13
...uot; to
refer to the type of
data that the SPARC-VIS, the PPC-Altivec, and the Intel-mmx/sse
(among others) instruction
sets support.
As far as I am aware not a single one of any of the above types of
instruction sets allows the "subscripting" of packed data within a
register (the Maspar
computer had hardware that would allow subscripting of sub-elements
of data within
a larger/wider register, but it was the exception, not the rule, and
it did not support
any of the saturating arithmetic that is part-and-parcel of the
packed data types in
the currently existing "multi-me...
2011 Feb 14
2
[LLVMdev] LLVMdev Digest, Vol 80, Issue 13
...the PPC-Altivec, and the Intel-mmx/sse
> > (among others) instruction
> > sets support.
> >
> > As far as I am aware not a single one of any of the above types of
> > instruction sets allows the "subscripting" of packed data within a
> > register (the Maspar
> > computer had hardware that would allow subscripting of sub-elements
> > of data within
> > a larger/wider register, but it was the exception, not the rule, and
> > it did not support
> > any of the saturating arithmetic that is part-and-parcel of the
> > pack...