search for: masked_store

Displaying 7 results from an estimated 7 matches for "masked_store".

2013 May 09
0
[LLVMdev] Predicated Vector Operations
...ple.com> wrote: > On May 8, 2013, at 4:00 PM, Eric Christopher <echristo at gmail.com> wrote: > > > Thinking that a masked store is conservatively a store of the full > width of the store right? > > > It depends on the optimization. Consider this example: > > masked_store(Val, Ptr , M) > X = masked_load(Ptr, M2) > > If you assume that your store actually overwrites everything in that > memory location then you don't need to load that memory location again. You > can simply use the stored value. However, in our example X != Val. > I'm not s...
2013 May 08
4
[LLVMdev] Predicated Vector Operations
On May 8, 2013, at 4:00 PM, Eric Christopher <echristo at gmail.com> wrote: > > Thinking that a masked store is conservatively a store of the full > width of the store right? It depends on the optimization. Consider this example: masked_store(Val, Ptr , M) X = masked_load(Ptr, M2) If you assume that your store actually overwrites everything in that memory location then you don't need to load that memory location again. You can simply use the stored value. However, in our example X != Val. > But Jim pointed out that anything me...
2013 May 09
4
[LLVMdev] Predicated Vector Operations
Chandler Carruth <chandlerc at google.com> writes: > What are the desired memory model semantics for a masked store? > Specifically, let me suppose a simplified vector model of <2 x i64> on > an i64-word-size platform. > > masked_store(<42, 42>, Ptr, <true, false>) > > Does this write to the entier <2 x i64> object stored at Ptr or not? No. It writes one element. > Put another way, consider: > > thread A: > ... > masked_store(<42, 42>, Ptr, <true, false>) > ... > > th...
2013 May 12
0
[LLVMdev] Predicated Vector Operations
...om> wrote: > Chandler Carruth <chandlerc at google.com> writes: > > > What are the desired memory model semantics for a masked store? > > Specifically, let me suppose a simplified vector model of <2 x i64> on > > an i64-word-size platform. > > > > masked_store(<42, 42>, Ptr, <true, false>) > > > > Does this write to the entier <2 x i64> object stored at Ptr or not? > > No. It writes one element. > Is this a statement about all of the existing hardware that supports masked stores, or about the desired semantics in...
2013 May 09
0
[LLVMdev] Predicated Vector Operations
...om> wrote: > Chandler Carruth <chandlerc at google.com> writes: > > > What are the desired memory model semantics for a masked store? > > Specifically, let me suppose a simplified vector model of <2 x i64> on > > an i64-word-size platform. > > > > masked_store(<42, 42>, Ptr, <true, false>) > > > > Does this write to the entier <2 x i64> object stored at Ptr or not? > > No. It writes one element. > > > Put another way, consider: > > > > thread A: > > ... > > masked_store(<42, 42>,...
2013 May 08
0
[LLVMdev] Predicated Vector Operations
On Wed, May 8, 2013 at 3:31 PM, Nadav Rotem <nrotem at apple.com> wrote: > > On May 8, 2013, at 1:59 PM, Eric Christopher <echristo at gmail.com> wrote: > > I can almost see that, but how is the intrinsic any different from a > conservative width for stores/loads where they're not handled by an > optimization pass? I'm assuming I'm missing something here.
2013 May 08
2
[LLVMdev] Predicated Vector Operations
On May 8, 2013, at 1:59 PM, Eric Christopher <echristo at gmail.com> wrote: > I can almost see that, but how is the intrinsic any different from a > conservative width for stores/loads where they're not handled by an > optimization pass? I'm assuming I'm missing something here. > > -eric I don't understand what you mean by "conservative width".