search for: maskbits

Just a trivial question... Do the hosts allow and hosts deny clauses (i.e. within smb.conf) support the use of IPv4 CIDR notation (e.g. A.B.C.D/maskbits) ? The specific documentation page I was looking at, i.e.: https://www.samba.org/samba/docs/using_samba/ch06.html was rather entirely ambiguous on this one small point. When describing the interfaces clause, it says explicitly that CIDRs are allowed. But when it comes to hosts allow and hos...

PCI devices save the msi and msix capability offset in pci_dev->msi_cap and pci_dev->msix_cap. When we access PCI device MSI and MSIX registers, we can use msi_cap and msix_cap in pci_dev directly. Remove the pos member in msi_attrib. Signed-off-by: Yijing Wang <wangyijing at huawei.com> --- arch/mips/pci/msi-octeon.c | 4 ++-- drivers/pci/host/pcie-designware.c | 2 +-

With the .end() accessor having become optional and noting that several of the accessors'' behavior really depends on the result of msi_maskable_irq(), the splits the MSI IRQ chip type into two - one for the maskable ones, and the other for the (MSI only) non-maskable ones. At once the implementation of those methods gets moved from io_apic.c to msi.c. Signed-off-by: Jan Beulich

...ndl Harald <h.reindl at thelounge.net> wrote: >Am 17.10.2017 um 04:24 schrieb Ronald F. Guilmette via samba: >> Just a trivial question... >> >> Do the hosts allow and hosts deny clauses (i.e. within smb.conf) support >> the use of IPv4 CIDR notation (e.g. A.B.C.D/maskbits) ? >> >> The specific documentation page I was looking at, i.e.: >> >> https://www.samba.org/samba/docs/using_samba/ch06.html >> >> was rather entirely ambiguous on this one small point. When describing >> the interfaces clause, it says explicitly t...

Signed-off-by: Jan Beulich <jbeulich@suse.com> --- a/xen/arch/x86/hpet.c +++ b/xen/arch/x86/hpet.c @@ -296,7 +296,7 @@ static void hpet_msi_ack(unsigned int ir { struct irq_desc *desc = irq_to_desc(irq); - irq_complete_move(&desc); + irq_complete_move(desc); move_native_irq(irq); ack_APIC_irq(); } --- a/xen/arch/x86/io_apic.c +++ b/xen/arch/x86/io_apic.c @@

...w </span><span class="cx"> </span><del>- *Cursor.new*(%(arg-type)char% bits[], %(arg-type)Integer% width, %(arg-type)Integer% height, - %(arg-type)Integer% hotSpotX=-1, - %(arg-type)Integer% hotSpotY=-1, - %(arg-type)char% maskBits[]=NULL, - %(arg-type)Colour% fg=NULL, - %(arg-type)Colour% bg=NULL) - -Constructs a cursor by passing an array of bits (Motif and GTK+ only). _maskBits_ is used only under -Motif and GTK+. The parameters _fg_ and _bg_ are only present on GTK+, and force the -cursor to use...

On Thu, 16 Feb 2023 17:30:37 +0000, Ulrich Sibiller <ulrich.sibiller at atos.net> wrote: > Martin Schwenke schrieb am 15.02.2023 23:23: > > OK, this part looks kind-of good. It would be interesting to know how > > long the entire failover process is taking. > > What exactly would you define as the begin and end of the failover? From "Takeover run

Use struct msi_ops to hook PCI MSI operations, and use struct msi_irqs to refactor PCI MSI drvier. Signed-off-by: Yijing Wang <wangyijing at huawei.com> --- drivers/pci/msi.c | 351 ++++++++++++++++++++++++++++++--------------------- include/linux/msi.h | 14 +- include/linux/pci.h | 11 +- 3 files changed, 222 insertions(+), 154 deletions(-) diff --git a/drivers/pci/msi.c

> -----Original Message----- > From: linux-pci-owner at vger.kernel.org [mailto:linux-pci-owner at vger.kernel.org] > On Behalf Of Yijing Wang > Sent: Saturday, July 26, 2014 8:39 AM > To: linux-kernel at vger.kernel.org > Cc: Xinwei Hu; Wuyun; Bjorn Helgaas; linux-pci at vger.kernel.org; > Paul.Mundt at huawei.com; James E.J. Bottomley; Marc Zyngier; linux-arm- > kernel at

> -----Original Message----- > From: linux-pci-owner at vger.kernel.org [mailto:linux-pci-owner at vger.kernel.org] > On Behalf Of Yijing Wang > Sent: Saturday, July 26, 2014 8:39 AM > To: linux-kernel at vger.kernel.org > Cc: Xinwei Hu; Wuyun; Bjorn Helgaas; linux-pci at vger.kernel.org; > Paul.Mundt at huawei.com; James E.J. Bottomley; Marc Zyngier; linux-arm- > kernel at

> -----Original Message----- > From: linux-pci-owner at vger.kernel.org [mailto:linux-pci-owner at vger.kernel.org] > On Behalf Of Yijing Wang > Sent: Saturday, July 26, 2014 8:39 AM > To: linux-kernel at vger.kernel.org > Cc: Xinwei Hu; Wuyun; Bjorn Helgaas; linux-pci at vger.kernel.org; > Paul.Mundt at huawei.com; James E.J. Bottomley; Marc Zyngier; linux-arm- > kernel at

> -----Original Message----- > From: linux-pci-owner at vger.kernel.org [mailto:linux-pci-owner at vger.kernel.org] > On Behalf Of Yijing Wang > Sent: Saturday, July 26, 2014 8:39 AM > To: linux-kernel at vger.kernel.org > Cc: Xinwei Hu; Wuyun; Bjorn Helgaas; linux-pci at vger.kernel.org; > Paul.Mundt at huawei.com; James E.J. Bottomley; Marc Zyngier; linux-arm- > kernel at

MSI interrupt will not only used in PCI device, more and more Non-PCI device also want to use MSI. ARM GIC v3 spec says in ARM platform with GIC v3 controller, Non-PCI device can also be design to support MSI to simplify interrupt wires, for the existing Non-PCI device, consolidator is designed and used to translate legacy interrupt to MSI. So for support Non-PCI MSI device, generic MSI driver is

Hi all, The series is a draft of generic MSI driver that supports PCI and Non-PCI device which have MSI capability. If you're not interested it, sorry for the noise. The series is based on Linux-3.16-rc1. MSI was introduced in PCI Spec 2.2. Currently, kernel MSI driver codes are bonding with PCI device. Because MSI has a lot advantages in design. More and more non-PCI devices want to use

Hi all, The series is a draft of generic MSI driver that supports PCI and Non-PCI device which have MSI capability. If you're not interested it, sorry for the noise. The series is based on Linux-3.16-rc1. MSI was introduced in PCI Spec 2.2. Currently, kernel MSI driver codes are bonding with PCI device. Because MSI has a lot advantages in design. More and more non-PCI devices want to use