Displaying 7 results from an estimated 7 matches for "mask_wb".
2012 Jul 09
2
[LLVMdev] question on table gen TIED_TO constraint
I need to implement an instruction which has 2 read-write registers, so I added
let Constraints = "$src1 = $dst, $mask = $mask_wb" in {
...
def rm : AVX28I<opc, MRMSrcMem, (outs VR128:$dst, VR128:$mask_wb),
(ins VR128:$src1, v128mem:$src2, VR128:$mask),
...
}
There is a problem since MRMSrcMem assumes the 2nd physical operand is a memory operand.
See the section about MRMSrcMem in RecognizableInstr::emi...
2012 Jul 10
2
[LLVMdev] question on table gen TIED_TO constraint
...On Jul 9, 2012, at 10:07 PM, Evan Cheng wrote:
>
>
> On Jul 9, 2012, at 4:15 PM, Manman Ren <mren at apple.com> wrote:
>
>>
>> I need to implement an instruction which has 2 read-write registers, so I added
>> let Constraints = "$src1 = $dst, $mask = $mask_wb" in {
>> ...
>> def rm : AVX28I<opc, MRMSrcMem, (outs VR128:$dst, VR128:$mask_wb),
>> (ins VR128:$src1, v128mem:$src2, VR128:$mask),
>> ...
>> }
>> There is a problem since MRMSrcMem assumes the 2nd physical operand is a memory operand.
>>...
2012 Jul 10
0
[LLVMdev] question on table gen TIED_TO constraint
...g wrote:
>
> >
> >
> > On Jul 9, 2012, at 4:15 PM, Manman Ren <mren at apple.com> wrote:
> >
> >>
> >> I need to implement an instruction which has 2 read-write registers, so
> I added
> >> let Constraints = "$src1 = $dst, $mask = $mask_wb" in {
> >> ...
> >> def rm : AVX28I<opc, MRMSrcMem, (outs VR128:$dst, VR128:$mask_wb),
> >> (ins VR128:$src1, v128mem:$src2, VR128:$mask),
> >> ...
> >> }
> >> There is a problem since MRMSrcMem assumes the 2nd physical operan...
2012 Jul 10
0
[LLVMdev] question on table gen TIED_TO constraint
On Jul 9, 2012, at 4:15 PM, Manman Ren <mren at apple.com> wrote:
>
> I need to implement an instruction which has 2 read-write registers, so I added
> let Constraints = "$src1 = $dst, $mask = $mask_wb" in {
> ...
> def rm : AVX28I<opc, MRMSrcMem, (outs VR128:$dst, VR128:$mask_wb),
> (ins VR128:$src1, v128mem:$src2, VR128:$mask),
> ...
> }
> There is a problem since MRMSrcMem assumes the 2nd physical operand is a memory operand.
> See the section about MR...
2017 Aug 07
3
VBROADCAST Implementation Issues
Thank You. Still getting errors.I have modified my instructions as you said
as follows:
def GATHER_256B : I<0x68, MRMSrcMem, (outs VR_2048:$dst, VK64WM:$mask_wb),
(ins VR_2048:$src1, VK64WM:$mask, i2048mem:$src2),
"GATHER_256B\t{$src2, {$dst} {${mask}}|${dst}
{${mask}}, $src2}",
[(set VR_2048:$dst, VK64WM:$mask_wb, (v64i32
(masked_gather (VR_2048:$src1), VK64WM:$mask,
addr:$src2)))],...
2017 Aug 07
2
VBROADCAST Implementation Issues
Hello,
I did as you said,
Please tell me whether the following correct now??
def GATHER_256B : I<0x68, MRMSrcMem, (outs VR_2048:$dst, _.KRCWM:$mask_wb),
(VR_2048:$src1, _.KRCWM:$mask, ins i2048mem:$src2),
"GATHER_256B\t{$src2, {$dst}{${mask}}|${dst} {${mask}},
$src2}"),
[(set VR_2048:$dst, _.KRCWM:$mask_wb, (v64i32
(GatherNode (VR_2048:$src1), _.KRCWM:$mask,
VR_2048:$src2))],...
2017 Aug 06
2
VBROADCAST Implementation Issues
i want to implement gather for v64i32. i wrote following code.
def GATHER_256B : I<0x68, MRMSrcMem, (outs VR_2048:$dst), (ins
i2048mem:$src),
"GATHER_256B\t{$src, $dst|$dst, $src}",
[(set VR_2048:$dst, (v64i32 (masked_gather
addr:$src)))],
IIC_MOV_MEM>, TA;
def: Pat<(v64f32 (masked_gather addr:$src)), (GATHER_256B