search for: marina

Some people on these lists may be interested in these positions at Google. Please contact Marina directly if you're interested. --Vikram http://www.cs.uiuc.edu/~vadve http://llvm.cs.uiuc.edu/ Begin forwarded message: > Hi Vikram, > > My name is Marina Moreno. I'm an Engineering Sourcer at Google in > the Platforms staffing group. I came across your resume on the &gt...

On Tue, 20 Mar 2007, Vikram S. Adve wrote: > Some people on these lists may be interested in these positions at Google. > Please contact Marina directly if you're interested. Are these job postings llvm-related? If not, they are off topic for this list. Thanks, -Chris > > Begin forwarded message: > >> Hi Vikram, >> >> My name is Marina Moreno. I'm an Engineering Sourcer at Google in the >>...

...egister? If there is, I'd rather we just implement it and leave it at that. > > We can probably fix the 'flags' case easily in LLVM, but I'd rather not bend over backwards to make ZMM0 be a global name when AVX is disabled. > > On Thu, Jul 23, 2015 at 9:12 AM, Yatsina, Marina <marina.yatsina at intel.com <mailto:marina.yatsina at intel.com>> wrote: > Microsoft assembler treats mov to EAX as a register, even if there is a global memory also named EAX – meaning the register takes precedence. > > But here I have a bit of a different situation – I have...

...gister or a register that does not exist in the current arch, just in future ones. Microsoft assembler treats these cases as memory locations, llvm treats them as registers, causing compilation errors. From: Reid Kleckner [mailto:rnk at google.com] Sent: Thursday, July 23, 2015 18:54 To: Yatsina, Marina Cc: llvmdev at cs.uiuc.edu Subject: Re: [LLVMdev] Intel asm syntax and variable names Suppose I have a global variable named 'EAX'. How do Intel assemblers normally escape register names to access such a global variable? On Thu, Jul 23, 2015 at 1:42 AM, Yatsina, Marina <marina.yatsina...

...the same name as a register? If there is, I'd rather we just implement it and leave it at that. We can probably fix the 'flags' case easily in LLVM, but I'd rather not bend over backwards to make ZMM0 be a global name when AVX is disabled. On Thu, Jul 23, 2015 at 9:12 AM, Yatsina, Marina <marina.yatsina at intel.com> wrote: > Microsoft assembler treats mov to EAX as a register, even if there is a > global memory also named EAX – meaning the register takes precedence. > > But here I have a bit of a different situation – I have a global variable, > which name h...

...’s worth checking if there is additional useful information we want to expose except the C labels used by inline assembly. If you prefer to separate the IR changes for “asm goto” and the IR changes that will allow exposing defined symbols, then we can focus on the “asm goto” feature alone. Thanks, Marina From: Chandler Carruth [mailto:chandlerc at gmail.com] Sent: Thursday, March 30, 2017 11:21 To: Yatsina, Marina <marina.yatsina at intel.com>; llvm-dev at lists.llvm.org; rnk at google.com; jyknight at google.com; ehsan at mozilla.com; rjmccall at apple.com; mehdi.amini at apple.com; chand...

...alaron la plataforma Platform: i686-pc-linux-gnu (32-bit). He intentado instalar el paquete dplR tanto desde el cran como desde un archivo y me da el siguiente error: ERROR: dependency ?XML? is not available for package ?dplR? Esto se debe a la versión de Linux que tengo instalada? gracias -- Ana Marina Srur Departamento de Dendrocronología e Historia Ambiental IANIGLA-CONICET-CCT Mendoza cc. 330, 5500, Mendoza, Argentina Telefax: (54261) 5244275-5244200 http://personal.mendoza-conicet.gov.ar/asrur

...e University of Southern California (USC), founded in 1880, is the largest private employer in the City of Los Angeles and proud recipient of Time Magazine's College of the Year 2000. USC offers competitive pay and an outstanding benefits package. **PLEASE NOTE THAT THIS POSITION IS LOCATED IN Marina del Rey, California** The USC Viterbi School of Engineering's Information Sciences Institute (ISI) in Marina del Rey, California is one of the world's leading research centers in the fields of computer science and information technology. ISI is seeking a Network Operations Specialist for...

Hi When I try and login as a domain user called s3: su MARINA\\s3 I get: Kerberos: AS-REQ MARINAs3 at HH3.SITE from ipv4:192.168.1.2:50945 for krbtgt/HH3.SITE at HH3.SITE Kerberos: UNKNOWN -- MARINAs3 at HH3.SITE: no such entry found in hdb Kerberos is not seeing the winbind separator. So I try winbind separator = + wbinfo -i s3 MARINA+s3:*:3000028:2051...

...ications use this tracing mechanism. I believe we already have much of the infrastructure in place (using the indirecbr instruction infrastructure). We do need to make sure MachineBlockPlacement optimizes the fall through path to make sure we can gain the performance for the nop patching. Thanks, Marina From: Chandler Carruth [mailto:chandlerc at gmail.com] Sent: Thursday, March 30, 2017 23:22 To: Yatsina, Marina <marina.yatsina at intel.com>; llvm-dev at lists.llvm.org; rnk at google.com; jyknight at google.com; ehsan at mozilla.com; rjmccall at apple.com; mehdi.amini at apple.com; matze a...

Suppose I have a global variable named 'EAX'. How do Intel assemblers normally escape register names to access such a global variable? On Thu, Jul 23, 2015 at 1:42 AM, Yatsina, Marina <marina.yatsina at intel.com> wrote: > Hi all, > > > > I’ve encountered an issue with x86 Intel asm syntax when using certain > variable names. > > > > If you look at the following example, where I try to do a mov to a memory > location named “flags2”, llvm-...

Hi Rotem, Thank to you, and especially to Marina! The problem gone. I'm a bit interested, what is the reason it worked in Win7, and not in Win8. I've recently used Process Explorer to discover, that the call was to ntdll.dll, which in Win8 is loaded to the totally different address. Best regards, Victor Milovanov Moscow State University...

> On Feb 4, 2018, at 9:15 AM, Yatsina, Marina via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > Hi, > > What is the best way to model a scheduler for a VLIW in-order architecture? > I’ve looked at the Hexagon and R600 architectures and they are using itineraries. I wanted to understand the benefit in using itinerarie...

...-512? Should this be allowed? We probably need some way to mark the registers (using attributes or predicates?) so that we'd know which ones are part of the legal set of registers that can be referenced in the architecture we're compiling too. Do you think this is a good approach? Thanks, Marina --------------------------------------------------------------------- Intel Israel (74) Limited This e-mail and any attachments may contain confidential material for the sole use of the intended recipient(s). Any review or distribution by others is strictly prohibited. If you are not the intende...

...pt para usar la función POSIXct y lo corro en otras computadoras con otras versiones de R y no tengo problemas ahora cuando lo corro en mi maquina donde tengo la versión 3.1.3 no me da ningun error pero genera una nueva columna con NA puede ser sólo problema de la versión de R? gracias ana -- Ana Marina Srur Departamento de Dendrocronología e Historia Ambiental IANIGLA-CONICET-CCT Mendoza cc. 330, 5500, Mendoza, Argentina Telefax: (54261) 5244275-5244200 http://personal.mendoza-conicet.gov.ar/asrur

...the case? Also, in this thread Phil says: "Some of the constraints that can be found in in-order micro architectures cannot be expressed in the per-operand scheduling model" Does anybody have an example of such constraints that will be harder to model with per operand scheduling? Thanks, Marina --------------------------------------------------------------------- Intel Israel (74) Limited This e-mail and any attachments may contain confidential material for the sole use of the intended recipient(s). Any review or distribution by others is strictly prohibited. If you are not the intended...

On Windows, the LLVM JIT runner looks for the '_chkstk' symbol by enumerating all of the loaded DLLs. On Win8, NTDLL.DLL (where _chkstk is defined) is found in a location that is more than 32bits bytes away from the jitted code. Marina's patch changes the code that generates a call to '_chkstk' from PCREL32 (which uses a 32bit offset) to an indirect call (which uses a 64bit address from a register). -----Original Message----- From: lost [mailto:lostfreeman at gmail.com] Sent: Saturday, March 03, 2012 01:32 To: Rote...

On Tue, Apr 4, 2017 at 6:07 AM Yatsina, Marina via llvm-dev < llvm-dev at lists.llvm.org> wrote: > Asm goto feature was introduces to GCC in order to optimize the support > for tracepoints in Linux kernel (it can be used for other things that do > nop patching). > > > > GCC documentation describes their motivating ex...

On Fri, Sep 08, 2023 at 11:38:40AM +0000, Maximilian Heyne wrote: > On Thu, Sep 07, 2023 at 05:28:25PM +0100, Catalin Marinas wrote: > > On Thu, Sep 07, 2023 at 02:17:16PM +0000, Maximilian Heyne wrote: > > > With the recent removal of vm_dev from devres its memory is only freed > > > via the callback virtio_mmio_release_dev. However, this only takes > > > effect after device_add is calle...

On Fri, Sep 08, 2023 at 11:38:40AM +0000, Maximilian Heyne wrote: > On Thu, Sep 07, 2023 at 05:28:25PM +0100, Catalin Marinas wrote: > > On Thu, Sep 07, 2023 at 02:17:16PM +0000, Maximilian Heyne wrote: > > > With the recent removal of vm_dev from devres its memory is only freed > > > via the callback virtio_mmio_release_dev. However, this only takes > > > effect after device_add is calle...