search for: marcellos

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2011 Nov 21
4
[LLVMdev] How to make Polly ignore some non-affine memory accesses
2011/11/21 Tobias Grosser <tobias at grosser.es>: > On 11/20/2011 04:36 PM, Marcello Maggioni wrote: >> >> Sorry for the noobish question, but what kind of subscripts generate a >> SCEVCouldNotCompute  from the SCEV engine? >> I tried for a while but I wasn't able to trigger that > > Hi Marcello, > > the SCEV returns SCEVCouldNotCompute in case it
2004 Apr 13
2
R apache and PHP
I've developed a web application in PHP and R my script is <?php ... exec("R CMD BATCH --silent /home/marcello/R_in/myfile.bat /home/marcello/R_out/myfile.out"); ... ?> This script execute in R batch mode and write the myfile.out. On Win2000 the similar script is ok, but on linux I've a problem. I suppose is a permession problem because the same script on shell
2015 Aug 27
2
preserve registers across function call
Hi Marcello, Thanks for your reply. I will try to pass down the mask! I have one more question. In my backend I return CSR_RegMask in getCallPreservedMask and return CSR_SaveList in getCalleeSavedRegs. Is that a correct setup? I dumped the regmask and found that callee saved regs are marked 1 and non-callee saved regs are 0. Thanks, Xiaochu On Wed, Aug 26, 2015 at 5:58 PM Marcello Maggioni
2014 Jun 20
2
Alleged bug in Silk codec
Hi Jean-Marc, well spotted! The patch provided fixes the issue for me. Nevertheless, in my code (and I would suggest doing the same in libopus) I am going to replace the function with one that accumulates on 64 bits and then calculates the shift, for at least 4 reasons: - It is less and simpler code - The result is likely to be slightly more accurate in case big numbers come early in the
2014 Jun 13
3
Alleged bug in Silk codec
Hi Jean Marc, please find attached the audio file (mono 16khz). I shortened it to about 10 seconds. I also add 2 patches that worked for me. Further info that might help: - The problem seems to be related to silk_burg_modified not reaching the maximum gain, so the actual filter order is 16 rather than 2 (which is what would be expected with a sine wave). - The problem seems to happen when
2011 Nov 22
1
[LLVMdev] How to make Polly ignore some non-affine memory accesses
On 11/18/2011 01:36 PM, Marcello Maggioni wrote: > 2011/11/18 Marcello Maggioni<hayarms at gmail.com>: >> The patch is attached. >> >> The patch to correct the test runs on OSX will be posted shortly after >> this one (I preferred to separate the two so that a problem with >> either one of the two wouldn't give problems to the other and also to >>
2007 Aug 03
2
Missing Heimdal, Kerberos, Samba and OpenLdap how-to
Hi, i'm looking for this how-to, often referenced but no more available: https://sec.miljovern.no/bin/view/Info/HeimdalKerberosSambaAndOpenLdap Is there anywhere an how-to about integrating Heimdal, Kerberos, Samba and OpenLdap? Thank you in advance Marcello
2014 Jun 24
5
[LLVMdev] Making it possible to clear the LLVMContext
Something like, keeping the compiler alive for a many compilation sessions, using the same LLVMContext, but without the problem of accumulating data in the LLVMContext that would slowly fill up the memory. This as much I can enter into details that I can :/ Probably this is also a quite common use case scenario too. Marcello 2014-06-24 18:52 GMT+01:00 Eric Christopher <echristo at
2011 Dec 04
0
[LLVMdev] How to make Polly ignore some non-affine memory accesses
On 11/21/2011 12:44 PM, Marcello Maggioni wrote: > 2011/11/21 Tobias Grosser<tobias at grosser.es>: >> On 11/20/2011 04:36 PM, Marcello Maggioni wrote: >>> >>> Sorry for the noobish question, but what kind of subscripts generate a >>> SCEVCouldNotCompute from the SCEV engine? >>> I tried for a while but I wasn't able to trigger that >>
2013 Sep 17
4
[LLVMdev] Is it safe to insert instructions in batches into BBs?
Hi, I'm getting a very strange behaviour while adding already created instructions in batches into basicblocks instead of creating and inserting them immediately. Because I need to insert instructions in a certain specific order inside multiple different BBs I found it easy to use the IRBuilder to create instructions without inserting them into a BB, storing them somewhere (vector, map
2011 Oct 03
4
[LLVMdev] How to make Polly ignore some non-affine memory accesses
Hi Tobias, thanks for the answer. I'll try to give a look to the code you pointed me to , and I'll try to make the modification myself. I'm new to LLVM and Polly, but the code of both seem clean and understandable, so I hope to be able to do it myself. In case I'll ask here for support :) Marcello 2011/10/1 Tobias Grosser <tobias at grosser.es>: > On 10/01/2011 03:26
2014 Jun 24
4
[LLVMdev] Making it possible to clear the LLVMContext
Hello, the need here is to have a single LLVMContext used for multiple compilations. You make a good point about that by the way. If there are outstanding users cleaning the context under their seats might still pose a risk to them, and in that case deleting + newing a new LLVMContextImpl might actually not be very different. Marcello 2014-06-24 17:14 GMT+01:00 David Blaikie <dblaikie at
2011 Nov 18
0
[LLVMdev] How to make Polly ignore some non-affine memory accesses
2011/11/18 Marcello Maggioni <hayarms at gmail.com>: > 2011/11/15 Marcello Maggioni <hayarms at gmail.com>: >> 2011/11/14 Tobias Grosser <tobias at grosser.es>: >>> On 11/14/2011 02:45 PM, Marcello Maggioni wrote: >>>> >>>> 2011/11/14 Tobias Grosser<tobias at grosser.es>: >>>>> >>>>> On 11/14/2011 01:24
2005 Oct 10
2
ntlm_auth SID problem
Hello all Im using a linux box running CentOS 4.1 as a proxy server with user auth with an AD Its working for a long time, but suddenly this weekend the users cant authenticate anymore looking on logs i obtain this Oct 10 08:29:59 sol (ntlm_auth): [2005/10/10 08:29:59, 0] utils/ntlm_auth.c:get_require_membership_sid(237) Oct 10 08:29:59 sol (ntlm_auth): Winbindd lookupname failed to resolve
2012 Feb 09
1
[LLVMdev] BackedgeTakenCount calculation for fortran loops and DragonEgg gfortran-4.6
FInally I had the time to complete everything up. Now I included the test case in the patch and the testcase runs with the LLVM tests system. 2012/2/9 Marcello Maggioni <hayarms at gmail.com>: > This is instead a very simple (handmade) test case that triggers the > problem (attached) > Also a more conforming patch has been attached > > 2012/2/9 Marcello Maggioni <hayarms
2012 Oct 19
11
[LLVMdev] Predication on SIMD architectures and LLVM
Hello, I'm working on a compiler based on LLVM for a SIMD architecture that supports instruction predication. We would like to implement branching on this architecture using predication. As you know the LLVM-IR doesn't support instruction predication, so I'm not exactly sure on what is the best way to implement it. We came up with some ways to do it in LLVM: - Do not add any
2013 Sep 21
3
[LLVMdev] Inserting a custom switch instruction implementation in backend
Hi, in implementing a backend for a target we work on, I ended up needing to lower the switch instruction in a very specific way that is quite different from the standard llvm way with the decision trees. The custom implementation wants to get rid of the decision blocks that llvm generates between the actual cases basic blocks and the switch root block. What I do currently is basically
2013 Sep 21
0
[LLVMdev] Inserting a custom switch instruction implementation in backend
Hello Probably the easiest way for you is to lower switch instructions via IR-to-IR pass in the way you want. On Sat, Sep 21, 2013 at 3:43 PM, Marcello Maggioni <marcello at codeplay.com> wrote: > Hi, > > in implementing a backend for a target we work on, I ended up needing to > lower the switch instruction in a very specific way that is quite different > from the standard
2013 Sep 18
0
[LLVMdev] Is it safe to insert instructions in batches into BBs?
Marcello Maggioni <marcello at codeplay.com> writes: > I'm getting a very strange behaviour while adding already created > instructions in batches into basicblocks instead of creating and > inserting them immediately. > > Because I need to insert instructions in a certain specific order > inside multiple different BBs I found it easy to use the IRBuilder to > create
2014 Jun 20
0
Alleged bug in Silk codec
Hi Marcello, Actually, we were careful to avoid the undefined behaviour here. In fact, we are specifically running a clang test detecting undefined behaviour. If you look at the silk_SMLABB_ovflw() macro, you will see it is based on silk_ADD32_ovflw(), which is defined as: #define silk_ADD32_ovflw(a, b) ((opus_int32)((opus_uint32)(a) + (opus_uint32)(b))) By casting to unsigned, all the cases