search for: map_irq

...RESOURCE_BUSY)) + return 0; + + return pci_resource_start(dev, bar); +} + /* * Protected by msi_lock */ static int msi_map_pirq_to_vector(struct pci_dev *dev, int pirq, - int entry_nr, int msi) + int entry_nr, u64 table_base) { struct physdev_map_pirq map_irq; int rc; @@ -254,10 +270,10 @@ map_irq.type = MAP_PIRQ_TYPE_MSI; map_irq.index = -1; map_irq.pirq = pirq; - map_irq.msi_info.bus = dev->bus->number; - map_irq.msi_info.devfn = dev->devfn; - map_irq.msi_info.entry_nr = entry_nr; - map_irq.msi_info.msi = msi; + map_irq.bus =...

...e1..c423285 100644 --- a/hw/pci.c +++ b/hw/pci.c @@ -938,6 +938,16 @@ PCIBus *pci_bridge_init(PCIBus *bus, int devfn, uint16_t vid, uint16_t did, return s->bus; } +PCIBus *pci_isa_bridge_init(PCIBus *bus, int devfn, uint16_t vid, uint16_t did, + uint8_t rid, pci_map_irq_fn map_irq, const char *name) +{ + PCIBus *s = pci_bridge_init(bus, devfn, vid, did, rid, map_irq, name); + + pci_config_set_class(s->parent_dev->config, PCI_CLASS_BRIDGE_ISA); + s->parent_dev->config[PCI_HEADER_TYPE] = 0x80; + return s; +} + int pt_chk_bar_overlap(PCIBus *...

...the VM in xenstore xen: Initialize event channels and io rings xen: Introduce the Xen mapcache piix3: introduce register_set_irq and register_map_irq piix_pci: introduce a write_config notifier vl.c: Introduce getter for shutdown_requested and reset_requested. xen: destroy the VM when shutdown is requested...

...us_save(QEMUFile *f, void *opaque) { PCIBus *bus = (PCIBus *)opaque; diff --git a/hw/pci.h b/hw/pci.h index a629e60..8883f08 100644 --- a/hw/pci.h +++ b/hw/pci.h @@ -280,4 +280,14 @@ PCIBus *pci_apb_init(target_phys_addr_t special_base, PCIBus *sh_pci_register_bus(pci_set_irq_fn set_irq, pci_map_irq_fn map_irq, qemu_irq *pic, int devfn_min, int nirq); +/* MSI/MSI-X */ + +struct pci_msi_ops { + qemu_irq *(*allocate)(int nentries); + int (*update)(qemu_irq, uint64_t addr, uint32_t data, int masked); + void (*free)(qemu_irq *); +}; + +extern struct pci_msi_...

...us_save(QEMUFile *f, void *opaque) { PCIBus *bus = (PCIBus *)opaque; diff --git a/hw/pci.h b/hw/pci.h index a629e60..8883f08 100644 --- a/hw/pci.h +++ b/hw/pci.h @@ -280,4 +280,14 @@ PCIBus *pci_apb_init(target_phys_addr_t special_base, PCIBus *sh_pci_register_bus(pci_set_irq_fn set_irq, pci_map_irq_fn map_irq, qemu_irq *pic, int devfn_min, int nirq); +/* MSI/MSI-X */ + +struct pci_msi_ops { + qemu_irq *(*allocate)(int nentries); + int (*update)(qemu_irq, uint64_t addr, uint32_t data, int masked); + void (*free)(qemu_irq *); +}; + +extern struct pci_msi_...

...PCICapConfigReadFunc *config_read, PCICapConfigWriteFunc *config_write, PCICapConfigInitFunc *config_init); +void pci_del_capability(PCIDevice *pci_dev, uint8_t cap_id, uint8_t cap_size); + int pci_map_irq(PCIDevice *pci_dev, int pin); uint32_t pci_default_read_config(PCIDevice *d, uint32_t address, int len); @@ -242,21 +261,45 @@ PCIBus *pci_bridge_init(PCIBus *bus, int devfn, uint16_t vid, uint16_t did, pci_map_irq_fn map_irq, const char *...

...PCICapConfigReadFunc *config_read, PCICapConfigWriteFunc *config_write, PCICapConfigInitFunc *config_init); +void pci_del_capability(PCIDevice *pci_dev, uint8_t cap_id, uint8_t cap_size); + int pci_map_irq(PCIDevice *pci_dev, int pin); uint32_t pci_default_read_config(PCIDevice *d, uint32_t address, int len); @@ -242,21 +261,45 @@ PCIBus *pci_bridge_init(PCIBus *bus, int devfn, uint16_t vid, uint16_t did, pci_map_irq_fn map_irq, const char *...

...PCICapConfigWriteFunc *config_write, PCICapConfigInitFunc *config_init); +void pci_del_capability(PCIDevice *pci_dev, uint8_t cap_id, uint8_t cap_size); + +uint8_t pci_find_capability(PCIDevice *pci_dev, uint8_t cap_id); + int pci_map_irq(PCIDevice *pci_dev, int pin); uint32_t pci_default_read_config(PCIDevice *d, uint32_t address, int len); @@ -246,21 +280,45 @@ PCIBus *pci_bridge_init(PCIBus *bus, int devfn, uint16_t vid, uint16_t did, pci_map_irq_fn map_irq, const char *...

...PCICapConfigWriteFunc *config_write, PCICapConfigInitFunc *config_init); +void pci_del_capability(PCIDevice *pci_dev, uint8_t cap_id, uint8_t cap_size); + +uint8_t pci_find_capability(PCIDevice *pci_dev, uint8_t cap_id); + int pci_map_irq(PCIDevice *pci_dev, int pin); uint32_t pci_default_read_config(PCIDevice *d, uint32_t address, int len); @@ -246,21 +280,45 @@ PCIBus *pci_bridge_init(PCIBus *bus, int devfn, uint16_t vid, uint16_t did, pci_map_irq_fn map_irq, const char *...

Userspace patches for the pci-passthrough functionality. The major updates since the last post are: - Loop to add passthrough devices in pc_init1 - Handle errors in read/write calls - Allow invocation without irq number for in-kernel irqchip Other than this, several small things were fixed according to review comments received last time.

Userspace patches for the pci-passthrough functionality. The major updates since the last post are: - Loop to add passthrough devices in pc_init1 - Handle errors in read/write calls - Allow invocation without irq number for in-kernel irqchip Other than this, several small things were fixed according to review comments received last time.

Hi all, The series is a draft of generic MSI driver that supports PCI and Non-PCI device which have MSI capability. If you're not interested it, sorry for the noise. The series is based on Linux-3.16-rc1. MSI was introduced in PCI Spec 2.2. Currently, kernel MSI driver codes are bonding with PCI device. Because MSI has a lot advantages in design. More and more non-PCI devices want to use

Hi all, The series is a draft of generic MSI driver that supports PCI and Non-PCI device which have MSI capability. If you're not interested it, sorry for the noise. The series is based on Linux-3.16-rc1. MSI was introduced in PCI Spec 2.2. Currently, kernel MSI driver codes are bonding with PCI device. Because MSI has a lot advantages in design. More and more non-PCI devices want to use