Displaying 6 results from an estimated 6 matches for "main_slot".
Did you mean:
mailslot
2018 Dec 12
0
[PATCH v2 03/18] drm/qxl: simplify slot management
...rt_phys_addr;
- uint64_t end_phys_addr;
+ uint64_t size;
uint64_t high_bits;
};
@@ -228,11 +230,8 @@ struct qxl_device {
unsigned int primary_created:1;
- struct qxl_memslot *mem_slots;
- uint8_t n_mem_slots;
-
- uint8_t main_mem_slot;
- uint8_t surfaces_mem_slot;
+ struct qxl_memslot main_slot;
+ struct qxl_memslot surfaces_slot;
uint8_t slot_id_bits;
uint8_t slot_gen_bits;
uint64_t va_slot_mask;
@@ -312,8 +311,8 @@ static inline uint64_t
qxl_bo_physical_address(struct qxl_device *qdev, struct qxl_bo *bo,
unsigned long offset)
{
- int slot_id = bo->type == QXL_GEM_DOMAIN...
2018 Dec 12
0
[PATCH v2 06/18] drm/qxl: use separate offset spaces for the two slots / ttm memory types.
...136,6 +136,7 @@ struct qxl_memslot {
uint64_t start_phys_addr;
uint64_t size;
uint64_t high_bits;
+ uint64_t gpu_offset;
};
enum {
@@ -312,8 +313,10 @@ qxl_bo_physical_address(struct qxl_device *qdev, struct qxl_bo *bo,
(bo->tbo.mem.mem_type == TTM_PL_VRAM)
? &qdev->main_slot : &qdev->surfaces_slot;
+ WARN_ON_ONCE((bo->tbo.offset & slot->gpu_offset) != slot->gpu_offset);
+
/* TODO - need to hold one of the locks to read tbo.offset */
- return slot->high_bits | (bo->tbo.offset + offset);
+ return slot->high_bits | (bo->tbo.offset - slo...
2018 Dec 12
0
[PATCH v2 05/18] drm/qxl: drop unused fields from struct qxl_device
...-
2 files changed, 2 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/qxl/qxl_drv.h b/drivers/gpu/drm/qxl/qxl_drv.h
index d015d4fff1..3ebe66abf2 100644
--- a/drivers/gpu/drm/qxl/qxl_drv.h
+++ b/drivers/gpu/drm/qxl/qxl_drv.h
@@ -232,9 +232,6 @@ struct qxl_device {
struct qxl_memslot main_slot;
struct qxl_memslot surfaces_slot;
- uint8_t slot_id_bits;
- uint8_t slot_gen_bits;
- uint64_t va_slot_mask;
spinlock_t release_lock;
struct idr release_idr;
diff --git a/drivers/gpu/drm/qxl/qxl_kms.c b/drivers/gpu/drm/qxl/qxl_kms.c
index a9288100ae..3c1753667d 100644
--- a/drivers/gpu/dr...
2018 Dec 12
0
[PATCH v2 12/18] drm/qxl: track primary bo
...rs/gpu/drm/qxl/qxl_drv.h
index cb767aaef6..150b1a4f66 100644
--- a/drivers/gpu/drm/qxl/qxl_drv.h
+++ b/drivers/gpu/drm/qxl/qxl_drv.h
@@ -229,7 +229,7 @@ struct qxl_device {
struct qxl_ram_header *ram_header;
- unsigned int primary_created:1;
+ struct qxl_bo *primary_bo;
struct qxl_memslot main_slot;
struct qxl_memslot surfaces_slot;
diff --git a/drivers/gpu/drm/qxl/qxl_cmd.c b/drivers/gpu/drm/qxl/qxl_cmd.c
index 626e803f60..aed0242e11 100644
--- a/drivers/gpu/drm/qxl/qxl_cmd.c
+++ b/drivers/gpu/drm/qxl/qxl_cmd.c
@@ -372,13 +372,16 @@ void qxl_io_flush_surfaces(struct qxl_device *qdev)
void...
2018 Dec 12
0
[PATCH v2 04/18] drm/qxl: change the way slot is detected
....h
@@ -311,7 +311,8 @@ static inline uint64_t
qxl_bo_physical_address(struct qxl_device *qdev, struct qxl_bo *bo,
unsigned long offset)
{
- struct qxl_memslot *slot = bo->type == QXL_GEM_DOMAIN_VRAM
+ struct qxl_memslot *slot =
+ (bo->tbo.mem.mem_type == TTM_PL_VRAM)
? &qdev->main_slot : &qdev->surfaces_slot;
/* TODO - need to hold one of the locks to read tbo.offset */
--
2.9.3
2018 Dec 12
0
[PATCH v2 14/18] drm/qxl: cover all crtcs in shadow bo.
...ex 150b1a4f66..43c6df9cf9 100644
--- a/drivers/gpu/drm/qxl/qxl_drv.h
+++ b/drivers/gpu/drm/qxl/qxl_drv.h
@@ -230,6 +230,8 @@ struct qxl_device {
struct qxl_ram_header *ram_header;
struct qxl_bo *primary_bo;
+ struct qxl_bo *dumb_shadow_bo;
+ struct qxl_head *dumb_heads;
struct qxl_memslot main_slot;
struct qxl_memslot surfaces_slot;
@@ -437,7 +439,8 @@ void qxl_draw_dirty_fb(struct qxl_device *qdev,
struct qxl_bo *bo,
unsigned int flags, unsigned int color,
struct drm_clip_rect *clips,
- unsigned int num_clips, int inc);
+ unsigned int num_clips...