search for: machineloopinfo

Displaying 20 results from an estimated 36 matches for "machineloopinfo".

2007 Dec 07
2
[LLVMdev] MachineLoopInfo Analysis Not Done
I'm trying to create the Machine LICM pass and I have this defined: class VISIBILITY_HIDDEN MachineLICM : public MachineFunctionPass { ... public: virtual void getAnalysisUsage(AnalysisUsage &AU) const { AU.setPreservesCFG(); AU.addRequired<MachineLoopInfo>(); AU.addRequired<MachineDominatorTree>(); } ... }; But when I go to use it: bool MachineLICM::runOnMachineFunction(MachineFunction &MF) { ... // Get our Loop information... LI = &getAnalysis<MachineLoopInfo>(); ... for (MachineLoopInf...
2007 Nov 29
2
[LLVMdev] LLVM on MinGW
...ilt out of the box for me a week ago on > MSYS/MINGW, using the following files: Ok, I tried to do the same. The compilations stops with the following error message (actually, I got to the same point in my attempt to build LLVM with the MinGW compiler shipped with Cygwin): llvm[1]: Compiling MachineLoopInfo.cpp for Debug build MachineLoopInfo.cpp: In instantiation of `llvm::LoopBase<BlockT>::LoopBase(const llvm::LoopBase<BlockT>&) [with BlockT = llvm::MachineBasicBlock]': MachineLoopInfo.cpp:22: instantiated from here MachineLoopInfo.cpp:22: error: explicit instantiation of `llvm...
2007 Dec 07
0
[LLVMdev] MachineLoopInfo Analysis Not Done
...PM, Bill Wendling wrote: > I'm trying to create the Machine LICM pass and I have this defined: > > But when I go to use it: > > bool MachineLICM::runOnMachineFunction(MachineFunction &MF) { > ... > // Get our Loop information... > LI = &getAnalysis<MachineLoopInfo>(); > ... > for (MachineLoopInfo::iterator > I = LI->begin(), E = LI->end(); I != E; ++I) { > ... > > it doesn't execute the loop. In fact, the analysis is never ran. How > do I force it to be run? Maybe this is because it has runOnFunction disabl...
2010 Oct 14
0
[LLVMdev] MachineLoopInfo question
Dear all, I found many methods (such as getTripCount, isLCSSAForm) are not supported for machine loops in MachineLoopInfo.h file. Does this mean I can not use MachineLoopInfo if I need getTripCount? Why not support them in MachineLoopInfo? Thank you!
2010 Mar 09
1
[LLVMdev] Find all backedges of CFG by MachineDominatorTree. please look at my jpg.
Hi:    I want to do some optimization on MachineLoop. So I want to get MachineLoopInfo from MachineFunction. I reference MachineLICM.cpp. So I try to write a pass in Target/mytarget directory. I find there is Error. llvm/include/llvm/PassAnalysisSupport.h:198: AnalysisType& llvm::Pass::getAnalysisID(const llvm::PassInfo*) const [with AnalysisType = llvm::MachineLoopInfo]: Asser...
2007 Nov 28
0
[LLVMdev] LLVM on MinGW
SVN head LLVM and Clang built out of the box for me a week ago on MSYS/ MINGW, using the following files: MinGW-5.1.3.exe MSYS-1.0.10.exe msysDTK-1.0.1.exe bash-3.1-MSYS-1.0.11-1.tar.bz2 bison-2.3-MSYS-1.0.11.tar.bz2 coreutils-5.97-MSYS-1.0.11-snapshot.tar.bz2 flex-2.5.33-MSYS-1.0.11.tar.bz2 gawk-3.1.5-MSYS-1.0.11-snapshot.tar.bz2 regex-0.12-MSYS-1.0.11.tar.bz2 1. install these components 2.
2012 Mar 29
2
[LLVMdev] VLIWPacketizerList: failing to schedule terminators
...MDGPU.h" #include "llvm/PassRegistry.h" #include "llvm/CodeGen/DFAPacketizer.h" #include "llvm/CodeGen/LiveIntervalAnalysis.h" #include "llvm/CodeGen/MachineDominators.h" #include "llvm/CodeGen/MachineFunctionPass.h" #include "llvm/CodeGen/MachineLoopInfo.h" using namespace llvm; namespace { class R600Packetizer : public VLIWPacketizerList { public: R600Packetizer(MachineFunction &MF, MachineLoopInfo &MLI, MachineDominatorTree &MDT, LiveIntervals * LIS); virtual bool isLegalToPacketizeTogether(SUnit *SUI,...
2016 Feb 11
3
Writing an LLVM Pass that depends on mem2reg
Hi, I read your post in LLVM forum. I want to use getAnalysisUsage(AnalysisUsage &AU) to get MachineLoopInfo. I have used this on my passes before but, this time I am trying to get this information in ScheduleDAGRRList scheduler class. There is no runonmachinefunction function. Do you know how I can implement this? Regards, Fateme I will appreciate it you can help me with this problem. <quote author=...
2010 Mar 09
1
[LLVMdev] Find all backedges of CFG by MachineDominatorTree. please look at my jpg.
...hbrenkun at yahoo.cn> > 抄送: "Benoit Boissinot" <bboissin+llvm at gmail.com>, "llvm" <llvmdev at cs.uiuc.edu> > 日期: 2010年3月9日,周二,下午2:02 > 任坤   wrote: > > Hi: > >     I want to do some optimization > on MachineLoop. > > So I want to get MachineLoopInfo from > MachineFunction. > > > > I reference MachineLICM.cpp. > > So I try to write a pass in Target/mytarget > directory. > > I find there is Error. > > llvm/include/llvm/PassAnalysisSupport.h:198: > AnalysisType&  llvm::Pass::getAnalysisID(const > llvm...
2013 Sep 11
0
[LLVMdev] Extracting libmachine from libcodegen (bug 1121)
...obabilityInfo > - MachineCodeEmitter > - MachineCopyPropagation > - MachineCSE > - MachineDominators > - MachineFunctionAnalysis > - MachineFunction > - MachineFunctionPass > - MachineFunctionPrinterPass > - MachineInstrBundle > - MachineInstr > - MachineLICM > - MachineLoopInfo > - MachineModuleInfo > - MachineModuleInfoImpls > - MachinePassRegistry > - MachinePostDominators > - MachineRegisterInfo > - MachineScheduler > - MachineSink > - MachineSSAUpdater > - MachineTraceMetrics > - MachineVerifier I *think* the goal here is to minimize the...
2007 Nov 28
5
[LLVMdev] LLVM on MinGW
Hello, I'm trying to use LLVM on Windows, using the MinGW toolchain that comes with Cygwin (gcc -mno-cygwin, not the standalone msys package). Has anyone successfully built LLVM from sources with this toolchain? The ./configure scripts automatically detects a Cygwin environment. I've spent some time trying to let it know that it should compile for MinGW. FWIW, here's what I've
2013 Sep 06
5
[LLVMdev] Extracting libmachine from libcodegen (bug 1121)
...BlockFrequencyInfo - MachineBlockPlacement - MachineBranchProbabilityInfo - MachineCodeEmitter - MachineCopyPropagation - MachineCSE - MachineDominators - MachineFunctionAnalysis - MachineFunction - MachineFunctionPass - MachineFunctionPrinterPass - MachineInstrBundle - MachineInstr - MachineLICM - MachineLoopInfo - MachineModuleInfo - MachineModuleInfoImpls - MachinePassRegistry - MachinePostDominators - MachineRegisterInfo - MachineScheduler - MachineSink - MachineSSAUpdater - MachineTraceMetrics - MachineVerifier Are there any files in this list that should not be moved? Any others that should be added?...
2015 Sep 04
2
LiveInterval and Loop Info
...<mbraun at apple.com> escreveu: > There is no direct support for this, but you can use > LiveIntervalAnalysis::getMBBStartIndex()/getMBBEndIndex()/getMBBFromIndex() > to relate the SlotIndexes used in the LiveIntervals to MachineBasicBlocks > which in turn you can relate to your MachineLoopInfo. > > - Matthias > > On Sep 3, 2015, at 10:47 AM, Natanael Ramos via llvm-dev < > llvm-dev at lists.llvm.org> wrote: > > Hello to all LLVM Developers. > > Given a object from a LiveInterval class, is there any way to know if this > Live Interval is part or is insi...
2009 May 05
0
[LLVMdev] unable to schedule pass message
...virtual void getAnalysisUsage(AnalysisUsage &AU) const { AU.addRequiredID(MachineDominatorsID); AU.addRequiredID(StrongPHIEliminationID); // Eliminate PHI nodes AU.addRequired<LiveStacks>(); AU.addPreserved<LiveStacks>(); AU.addRequired<MachineLoopInfo>(); AU.addPreserved<MachineLoopInfo>(); MachineFunctionPass::getAnalysisUsage(AU); } but I get the following error at runtime Unable to schedule 'MachineDominator Tree Construction' required by 'Eliminate PHI nodes for register allocation, intelligently' ....
2015 Sep 03
2
LiveInterval and Loop Info
Hello to all LLVM Developers. Given a object from a LiveInterval class, is there any way to know if this Live Interval is part or is inside a loop? Att -- Natanael Ramos Membro do corpo discente de Ciência da Computação pelo Instituto Federal de Minas Gerais - Campus Formiga -------------- next part -------------- An HTML attachment was scrubbed... URL:
2013 Sep 12
2
[LLVMdev] Extracting libmachine from libcodegen (bug 1121)
...lock >> - MachineBranchProbabilityInfo >> - MachineCodeEmitter >> - MachineDominators >> - MachineFunctionAnalysis >> - MachineFunction >> - MachineFunctionPass >> - MachineFunctionPrinterPass >> - MachineInstrBundle >> - MachineInstr >> - MachineLoopInfo >> - MachineModuleInfo >> - MachineModuleInfoImpls >> - MachinePassRegistry >> - MachinePostDominators >> - MachineRegisterInfo >> - MachineSSAUpdater >> - MachineVerifier Thanks for whittling the list down, Andrew. One question that has been nagging at m...
2015 Nov 20
2
[AArch64] bug in shrink-wrapping
Hi Arnaud, Thanks for following up with that and sorry for the breakage. Couple of comments: MachineLoopInfo *MLI; + RegScavenger *RS; Would it make sense to use a unique_ptr here? That should eliminate the need of having explicit deletes. +; RUN: llc -mtriple=aarch64-linux-gnu -o - %s Add -enable-shrink-wrap=true and a second RUN line with -enable-shrink-wrap=false. Then add check lines for both to e...
2011 Oct 20
0
[LLVMdev] Question regarding basic-block placement optimization
...the exit block last. It is not clear to me that this algorithm handles that properly. How do you ensure that BlockChains start at loop headers? How do you ensure that loop exits are laid out following the loop body, especially in the presence of critical edges? Why not layout blocks according to MachineLoopInfo? The SCC abstraction seems overly generic and unnecessary. When you merge chains, why don't you delete the edge between the chains? Why do you run profile guided block layout after the existing CodePlacementOpt? Shouldn't it be the other way around so that CodePlacementOpt can cleanup loo...
2011 Oct 19
3
[LLVMdev] Question regarding basic-block placement optimization
On Oct 19, 2011, at 5:50 AM, Chandler Carruth wrote: > Ok, wow that wasn't hard at all. Awesome ;-) > This is still *very* much a rough draft, but it's probably better to review that the previous patch. One big caveat, I know I have an iteration bug in here somewhere that is inf-looping. Just ran out of steam debugging it, will pick it back up again later today to shake it out.
2017 May 03
2
RFC: Shrink wrapping vs SplitCSR
Hi all, We've seen several examples recently of performance opportunities on POWER if we can improve the location of save/restore code for callee-saved registers. Both Nemanja and myself have discussed this with several people, and it seems that there are two possibilities for improving this: 1. Extend shrink wrapping to make the analysis of callee-saved registers more precise. 2.