Displaying 5 results from an estimated 5 matches for "machinefunctionproperties".
2018 Jan 15
0
Checking when Register Allocation has been performed
Maybe
MF.getProperties().hasProperty(MachineFunctionProperties::Property::NoVRegs))?
~Craig
On Mon, Jan 15, 2018 at 12:07 PM, Martin J. O'Riordan via llvm-dev <
llvm-dev at lists.llvm.org> wrote:
> Hi LLVM Devs,
>
>
>
> I have some shared code that performs lowering operations that can occur
> before or after register allocation....
2018 Jan 15
3
Checking when Register Allocation has been performed
Hi LLVM Devs,
I have some shared code that performs lowering operations that can occur
before or after register allocation. When it is pre-RA I want to only use
virtual registers for intermediate results, but post-RA I have to use only a
very restricted set of physical registers.
Code generation using the restricted set is not as efficient as it is when I
can use virtual registers. At
2018 Jan 16
2
Checking when Register Allocation has been performed
...t the NoVRrgs flag pre-ra even if there are no vregs used, when loading a .mir file for example the flag is computed from scratch and will be set.
> On Jan 15, 2018, at 12:26 PM, Craig Topper via llvm-dev <llvm-dev at lists.llvm.org> wrote:
>
> Maybe MF.getProperties().hasProperty(MachineFunctionProperties::Property::NoVRegs))?
>
> ~Craig
>
> On Mon, Jan 15, 2018 at 12:07 PM, Martin J. O'Riordan via llvm-dev <llvm-dev at lists.llvm.org <mailto:llvm-dev at lists.llvm.org>> wrote:
> Hi LLVM Devs,
>
>
>
> I have some shared code that performs lowering ope...
2018 Jan 17
0
Checking when Register Allocation has been performed
...there are no vregs used, when loading a .mir file for example the flag is computed from scratch and will be set.
On Jan 15, 2018, at 12:26 PM, Craig Topper via llvm-dev <llvm-dev at lists.llvm.org <mailto:llvm-dev at lists.llvm.org> > wrote:
Maybe MF.getProperties().hasProperty(MachineFunctionProperties::Property::NoVRegs))?
~Craig
On Mon, Jan 15, 2018 at 12:07 PM, Martin J. O'Riordan via llvm-dev <llvm-dev at lists.llvm.org <mailto:llvm-dev at lists.llvm.org> > wrote:
Hi LLVM Devs,
I have some shared code that performs lowering operations that can occur before or afte...
2020 Jul 11
2
[RFC] Introducing classes for the codegen driven by new pass manager
...n expertise to do correctly and efficiently. This includes target-independent codegen IR/machine passes and target-specific codegen IR/machine passes.
- 100% codegen feature parity between LPM and NPM. It's very likely that I did not port some features in this work. A few I'm aware of are `MachineFunctionProperties`, `-debugify-and-strip-all`, and "machine pass plugins". However, if the community is convinced this work is the right design, these missing features could be added by interested parties.
** Implementation / Design Choices **
* Goal-1 *
https://reviews.llvm.org/D67687
Four member me...