search for: machinedominatortree

Displaying 20 results from an estimated 21 matches for "machinedominatortree".

2010 Jan 25
2
[LLVMdev] Find all backedges of CFG by MachineDominatorTree. please look at my jpg.
Hi: I hope to cut all backedges of MachineFunction CFG, then topological sort MachineBasicBlocks. 1. MachineDominatorTree *domintree = new MachineDominatorTree(); domintree->runOnMachineFunction(mf); 2. Then travel mf one by one. When domintree->dominates(next,current) is true, there is a backedge from current node to next node. move this backedge form CFG. But I find A LOOP in some CFG, there is back...
2010 Jan 25
0
[LLVMdev] Find all backedges of CFG by MachineDominatorTree. please look at my jpg.
2010/1/25 任坤 <hbrenkun at yahoo.cn>: > Hi: > > I hope to cut all backedges of MachineFunction CFG, then topological sort MachineBasicBlocks. > > 1. MachineDominatorTree *domintree = new MachineDominatorTree(); > domintree->runOnMachineFunction(mf); > > 2. Then travel mf one by one. > When domintree->dominates(next,current) is true, there is a backedge from current node to next node. move this backedge form CFG. > > But I find A LOOP i...
2010 Jan 25
0
[LLVMdev] About MachineDominatorTree Pass.
Hi: I hope to cut all backedges of MachineFunction CFG, then topological sort MachineBasicBlocks. 1. MachineDominatorTree *domintree = new MachineDominatorTree(); domintree->runOnMachineFunction(mf); 2. Then travel mf one by one. When domintree->dominates(next,current) is true, there is a backedge from current node to next node. move this backedge form CFG. But I find A LOOP in some CFG, there is back...
2010 Mar 09
1
[LLVMdev] Find all backedges of CFG by MachineDominatorTree. please look at my jpg.
...Info]: Assertion `ResultPass && "getAnalysis*() called on an analysis that was not 'required' by pass!"' failed. **************************** runOnMachineFunction(MachineFunction &MF) { LI = &getAnalysis<MachineLoopInfo>(); DT = &getAnalysis<MachineDominatorTree>(); for (MachineLoopInfo::iterator I = LI->begin(), E = LI->end(); I != E; ++I) { CurLoop = *I; } } ****************************** I copy find from MachineLICM.cpp, and change class name. What is different ?? Thanks. Ren Kun --- 10年1月26日,周二, Benoit Boissinot <b...
2007 Dec 10
1
[LLVMdev] MachineDominatorTree
Hi, guys, what is the interface for finding the immediate dominator of a machine basic block in LLVM 2.1? I found some methods to check if a node dominates other in llvm::MachineDominatorTree, but I was looking for something like: MachineBasicBlock * mbb = ... MachineBasicBlock * iDom = XXX->getImmediateDominator(mbb); is there something similar? best, Fernando
2010 Mar 09
1
[LLVMdev] Find all backedges of CFG by MachineDominatorTree. please look at my jpg.
...ot find some backedge. Is it means some MachineLoop is not be found? dominatorTree.jpg is a previous exmaple. best regards! renkun --- 10年3月9日,周二, Nick Lewycky <nicholas at mxc.ca> 写道: > 发件人: Nick Lewycky <nicholas at mxc.ca> > 主题: Re: [LLVMdev] Find all backedges of CFG by MachineDominatorTree. please look at my jpg. > 收件人: "任坤" <hbrenkun at yahoo.cn> > 抄送: "Benoit Boissinot" <bboissin+llvm at gmail.com>, "llvm" <llvmdev at cs.uiuc.edu> > 日期: 2010年3月9日,周二,下午2:02 > 任坤   wrote: > > Hi: > >     I want to do some optimiz...
2010 Jan 26
1
[LLVMdev] Find all backedges of CFG by MachineDominatorTree. please look at my jpg.
...M is Loop header node. If I cut these edges from CFG, CFG can be topological sort. Am I right??? --- 10年1月26日,周二, Benoit Boissinot <bboissin+llvm at gmail.com> 写道: > 发件人: Benoit Boissinot <bboissin+llvm at gmail.com> > 主题: Re: [LLVMdev] Find all backedges of CFG by MachineDominatorTree. please look at my jpg. > 收件人: "任坤" <hbrenkun at yahoo.cn> > 日期: 2010年1月26日,周二,下午3:12 > On Tue, Jan 26, 2010 at 01:31:53PM > +0800, 浠诲潳   wrote: > > Hi, Dear Boissinot: > > > > If a graph(CFG) is irreducible, how to find every loop > headers of CFG...
2012 Mar 29
2
[LLVMdev] VLIWPacketizerList: failing to schedule terminators
....h" #include "llvm/CodeGen/MachineFunctionPass.h" #include "llvm/CodeGen/MachineLoopInfo.h" using namespace llvm; namespace { class R600Packetizer : public VLIWPacketizerList { public: R600Packetizer(MachineFunction &MF, MachineLoopInfo &MLI, MachineDominatorTree &MDT, LiveIntervals * LIS); virtual bool isLegalToPacketizeTogether(SUnit *SUI, SUnit * SUJ); virtual bool isLegalToPruneDependencies(SUnit *SUI, SUnit * SUJ); }; R600Packetizer::R600Packetizer(MachineFunction &MF, MachineLoopInfo &MLI, MachineDomin...
2009 Dec 04
0
[LLVMdev] hi, Hi, (Preccessors' Number) < MachineBasicBlock's Number < (Successors's Number), Is it really?
...ravelling CFG with MachineFunction. So I want to sure it. > (Preccessors' Number) < MachineBasicBlock's Number < (Successors's Number), Is it really? If the CFG contains loops, how could this be possible? Anyway, no you can't use MBB numbers for that. Perhaps you need the MachineDominatorTree analysis? Regards, /jakob
2010 Nov 24
2
[LLVMdev] A way to traverse machine basic blocks in order?
I'm looking for a way to traverse machine basic blocks in a specific order. Basically I want all blocks that are predecessors to the current block to be traversed before the current block. I've looked at MachineDominatorTree but this doesn't traverse them in quite the way I want them to. Anyone know of a way to do this? Thanks, Micah -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20101123/1cdb0f59/attachment.html>
2009 Dec 04
4
[LLVMdev] hi, Hi, (Preccessors' Number) < MachineBasicBlock's Number < (Successors's Number), Is it really?
Hi, EveryOne: I am travelling CFG with MachineFunction. So I want to sure it. (Preccessors' Number) < MachineBasicBlock's Number < (Successors's Number), Is it really? best regards. ___________________________________________________________ 好玩贺卡等你发,邮箱贺卡全新上线! http://card.mail.cn.yahoo.com/ -------------- next part -------------- An HTML attachment was scrubbed...
2010 May 01
1
[LLVMdev] How to change successor of a regular Basic block
Hi, I am working with regular dominator tree and not MachineDominatorTree. I wanted to modify the CFG structure and for that I need to change successor of a basic block. How can I do that? Or is there a way to cast a BasicBlock to MachineBasicBlock so that i can use functions addSucessor and removeSuccessor for the basic block. It will be great if someone can help....
2013 Apr 25
0
[LLVMdev] How to know if an instruction is "usable"
On 4/25/2013 12:06 PM, Giacomo Tagliabue wrote: > Thanks, > So, how do I check if a block dominates another one? In IR use analysis DominatorTree from "include/llvm/Analysis/Dominators.h". For machine instructions, use MachineDominatorTree from "include/llvm/CodeGen/MachineDominators.h". Both of them implement function "dominates" that takes two blocks (BasicBlock* or MachineBasicBlock*) and returns a boolean value indicating whether one dominates the other. A block will always dominate itself, so this case n...
2010 Nov 24
0
[LLVMdev] A way to traverse machine basic blocks in order?
...k of the entire graph. Cameron On Nov 23, 2010, at 9:21 PM, Villmow, Micah wrote: > I’m looking for a way to traverse machine basic blocks in a specific order. > Basically I want all blocks that are predecessors to the current block to be traversed before the current block. I’ve looked at MachineDominatorTree but this doesn’t traverse them in quite the way I want them to. Anyone know of a way to do this? > > Thanks, > Micah > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu > http://lists.cs.uiu...
2013 Apr 25
2
[LLVMdev] How to know if an instruction is "usable"
Thanks, So, how do I check if a block dominates another one? On 25 April 2013 11:59, Krzysztof Parzyszek <kparzysz at codeaurora.org> wrote: > On 4/25/2013 11:52 AM, Giacomo Tagliabue wrote: > >> Is there an easy way to know if, at a certain instruction, a certain >> value is usable or not? i.e., I am sure that if i use that value i don't >> to get the error
2013 Apr 25
1
[LLVMdev] How to know if an instruction is "usable"
...ora.org> wrote: > On 4/25/2013 12:06 PM, Giacomo Tagliabue wrote: > >> Thanks, >> So, how do I check if a block dominates another one? >> > > In IR use analysis DominatorTree from "include/llvm/Analysis/**Dominators.h". > For machine instructions, use MachineDominatorTree > from "include/llvm/CodeGen/**MachineDominators.h". > > Both of them implement function "dominates" that takes two blocks > (BasicBlock* or MachineBasicBlock*) and returns a boolean value indicating > whether one dominates the other. A block will always dominate...
2007 Dec 07
2
[LLVMdev] MachineLoopInfo Analysis Not Done
...the Machine LICM pass and I have this defined: class VISIBILITY_HIDDEN MachineLICM : public MachineFunctionPass { ... public: virtual void getAnalysisUsage(AnalysisUsage &AU) const { AU.setPreservesCFG(); AU.addRequired<MachineLoopInfo>(); AU.addRequired<MachineDominatorTree>(); } ... }; But when I go to use it: bool MachineLICM::runOnMachineFunction(MachineFunction &MF) { ... // Get our Loop information... LI = &getAnalysis<MachineLoopInfo>(); ... for (MachineLoopInfo::iterator I = LI->begin(), E = LI->en...
2016 Mar 16
2
[VSXFMAMutate] OldFMAReg may be wrongly rewritten
...xt.ll, the only copy is also eliminated. The new pass in theory can support any kinds of instructions that may pick one among multiple its operands as an in-out register. VSX FMA instructions are just some examples. The drawback is this pass requires LiveIntervals analysis at SSA form and Machine MachineDominatorTree analysis. It definitely preserves the former, but not sure about the latter - it rearranges operands and re-tie them. If you think this result is good enough, I'll go ahead and do a bit cleanup and code optimization. It's in theory as fast as a topological sort. On Fri, Mar 4, 2016 at 5:1...
2016 Mar 23
0
[VSXFMAMutate] OldFMAReg may be wrongly rewritten
...inated. > > The new pass in theory can support any kinds of instructions that may pick > one among multiple its operands as an in-out register. VSX FMA instructions > are just some examples. > > The drawback is this pass requires LiveIntervals analysis at SSA form and > Machine MachineDominatorTree analysis. It definitely preserves the former, > but not sure about the latter - it rearranges operands and re-tie them. > > If you think this result is good enough, I'll go ahead and do a bit > cleanup and code optimization. It's in theory as fast as a topological sort. > &gt...
2016 Mar 05
2
[VSXFMAMutate] OldFMAReg may be wrongly rewritten
I wonder if we can do this in a separate analysis MachineFunction SSA pass. 1) SelectionDAG will generate a pseudo instruction MutatingFMA. When it's generated it's allowed to have d = a * b + c form, where d doesn't have to be in {a, b, c}. 2) Later, the proposed pass uses an algorithm to decide for instruction MI: `%vreg0 = MutatingFMA %vreg1, %vreg2, %vreg3`, it should tie %vreg0