Displaying 20 results from an estimated 24 matches for "machinedominators".
2013 Sep 06
5
[LLVMdev] Extracting libmachine from libcodegen (bug 1121)
...rting from the assumption that we'll be moving only the modules
that start with 'Machine' into the new library. These are:
- MachineBasicBlock
- MachineBlockFrequencyInfo
- MachineBlockPlacement
- MachineBranchProbabilityInfo
- MachineCodeEmitter
- MachineCopyPropagation
- MachineCSE
- MachineDominators
- MachineFunctionAnalysis
- MachineFunction
- MachineFunctionPass
- MachineFunctionPrinterPass
- MachineInstrBundle
- MachineInstr
- MachineLICM
- MachineLoopInfo
- MachineModuleInfo
- MachineModuleInfoImpls
- MachinePassRegistry
- MachinePostDominators
- MachineRegisterInfo
- MachineScheduler
- Ma...
2010 Aug 11
1
[LLVMdev] Need advice on writing scheduling pass
Hello LLVM developers,
I have a few questions regarding the passes that are run after instruction
selection and before register allocation. I am writing a scheduling pass
(modulo scheduling). Before I ask my questions, I will first try to explain
the approach I am taking.
- Currently, I am running the passes in the following order.
(-debug-pass=Structure output)
Remove unreachable machine
2013 Sep 11
0
[LLVMdev] Extracting libmachine from libcodegen (bug 1121)
...only the modules
> that start with 'Machine' into the new library. These are:
>
> - MachineBasicBlock
> - MachineBlockFrequencyInfo
> - MachineBlockPlacement
> - MachineBranchProbabilityInfo
> - MachineCodeEmitter
> - MachineCopyPropagation
> - MachineCSE
> - MachineDominators
> - MachineFunctionAnalysis
> - MachineFunction
> - MachineFunctionPass
> - MachineFunctionPrinterPass
> - MachineInstrBundle
> - MachineInstr
> - MachineLICM
> - MachineLoopInfo
> - MachineModuleInfo
> - MachineModuleInfoImpls
> - MachinePassRegistry
> - Machine...
2012 Nov 20
3
[LLVMdev] Possible bug in LLC at -O1
Hi
I am seeing an issue (compiled application seg faults) when llc is
used at -O1. I first need to triage out which optimization/pass is
responsible for the seg fault. As such I am following this strategy:
disable gradually those passes at -O1 which do not exist at -O0. For
this I used -pass-debug=Structure. [ diff pasted at the end for
reference]
The problem is I have used almost all -disable-*
2012 Apr 25
2
[LLVMdev] CriticalAntiDepBreaker rewrites a register operand of a call instruction
Hi Anton,
I ran llc with -verify-coalescing. There were no error messages.
Then I added code in MipsPassConfig::addPreEmitPass() to prevent machine
verifier from running post delay -slot-filler, and ran llc again. Again,
there were no error messages.
This is the list of passes run after post-RA scheduling. machine verifier
is run twice after post RA scheduler (and CriticalAntiDepBreaker) is run.
2013 Apr 25
0
[LLVMdev] How to know if an instruction is "usable"
On 4/25/2013 12:06 PM, Giacomo Tagliabue wrote:
> Thanks,
> So, how do I check if a block dominates another one?
In IR use analysis DominatorTree from
"include/llvm/Analysis/Dominators.h". For machine instructions, use
MachineDominatorTree
from "include/llvm/CodeGen/MachineDominators.h".
Both of them implement function "dominates" that takes two blocks
(BasicBlock* or MachineBasicBlock*) and returns a boolean value
indicating whether one dominates the other. A block will always
dominate itself, so this case needs to be handled separately to
determine relati...
2013 Apr 25
2
[LLVMdev] How to know if an instruction is "usable"
Thanks,
So, how do I check if a block dominates another one?
On 25 April 2013 11:59, Krzysztof Parzyszek <kparzysz at codeaurora.org> wrote:
> On 4/25/2013 11:52 AM, Giacomo Tagliabue wrote:
>
>> Is there an easy way to know if, at a certain instruction, a certain
>> value is usable or not? i.e., I am sure that if i use that value i don't
>> to get the error
2012 Apr 25
0
[LLVMdev] CriticalAntiDepBreaker rewrites a register operand of a call instruction
Sorry, I meant to say,
I added code to prevent llc from running machine verifier after delay slots
are filled.
MipsInstrInfo::AnalyzeBranch generates incorrect results after delay slots
are filled. Also, it seems that code in MachineVerifier.cpp wasn't written
with architectures that have delay slots in mind.
On Wed, Apr 25, 2012 at 11:59 AM, Akira Hatanaka <ahatanak at gmail.com>
2009 May 05
0
[LLVMdev] unable to schedule pass message
...but perhaps someone has seen this before and can
answer. I am trying to add a new register allocator to my target, and would
like to use the Strong Phi Elimination pass. I am doing the following in my
allocator
virtual void getAnalysisUsage(AnalysisUsage &AU) const {
AU.addRequiredID(MachineDominatorsID);
AU.addRequiredID(StrongPHIEliminationID); // Eliminate PHI
nodes
AU.addRequired<LiveStacks>();
AU.addPreserved<LiveStacks>();
AU.addRequired<MachineLoopInfo>();
AU.addPreserved<MachineLoopInfo>();
MachineFunctionPass::getAnal...
2012 Apr 25
0
[LLVMdev] CriticalAntiDepBreaker rewrites a register operand of a call instruction
Hi Akira,
> When I add -verify-machineinstrs, it complains that there are instructions
> after terminator instructions.
Yes, -verify-machineinstrs and -verify-coalescing are your friends here :)
--
With best regards, Anton Korobeynikov
Faculty of Mathematics and Mechanics, Saint Petersburg State University
2013 Apr 25
1
[LLVMdev] How to know if an instruction is "usable"
...iabue wrote:
>
>> Thanks,
>> So, how do I check if a block dominates another one?
>>
>
> In IR use analysis DominatorTree from "include/llvm/Analysis/**Dominators.h".
> For machine instructions, use MachineDominatorTree
> from "include/llvm/CodeGen/**MachineDominators.h".
>
> Both of them implement function "dominates" that takes two blocks
> (BasicBlock* or MachineBasicBlock*) and returns a boolean value indicating
> whether one dominates the other. A block will always dominate itself, so
> this case needs to be handled separately...
2007 Dec 10
1
[LLVMdev] MachineDominatorTree
Hi, guys,
what is the interface for finding the immediate dominator of a machine
basic block in LLVM 2.1? I found some methods to check if a node dominates
other in llvm::MachineDominatorTree, but I was looking for something like:
MachineBasicBlock * mbb = ...
MachineBasicBlock * iDom = XXX->getImmediateDominator(mbb);
is there something similar?
best,
Fernando
2012 Nov 23
2
[LLVMdev] [cfe-dev] costing optimisations
On 23.11.2012, at 15:12, john skaller <skaller at users.sourceforge.net> wrote:
>
> On 23/11/2012, at 5:46 PM, Sean Silva wrote:
>
>> Adding LLVMdev, since this is intimately related to the optimization passes.
>>
>>> I think this is roughly because some function level optimisations are
>>> worse than O(N) in the number of instructions.
>>
2013 Sep 12
2
[LLVMdev] Extracting libmachine from libcodegen (bug 1121)
...some core analysis passes. The “Machine” modules you listed above include machine code analysis or transform passes that you probably don’t want. Pruning the list to basic IR support:
>
>> - MachineBasicBlock
>> - MachineBranchProbabilityInfo
>> - MachineCodeEmitter
>> - MachineDominators
>> - MachineFunctionAnalysis
>> - MachineFunction
>> - MachineFunctionPass
>> - MachineFunctionPrinterPass
>> - MachineInstrBundle
>> - MachineInstr
>> - MachineLoopInfo
>> - MachineModuleInfo
>> - MachineModuleInfoImpls
>> - MachinePassRe...
2012 Apr 25
2
[LLVMdev] CriticalAntiDepBreaker rewrites a register operand of a call instruction
Hi Anton,
Thanks for the suggestions.
I compiled the .ll file with llc with command line options
-verify-dom-info, -verify-regalloc and -verify-loop-info.
I didn't see any diagnostic messages.
When I add -verify-machineinstrs, it complains that there are instructions
after terminator instructions.
It seems that these error messages are printed because the verifier does
not understand that
2011 May 24
4
[LLVMdev] Need advice on writing scheduling pass
Hi (Jakob),
in reference to the prior message below, I have the following follow-up questions, as I also need a scheduling pass
prior to regalloc. I need to do this in order to set VLIW-flags, so that the RA is aware of several MI's
per cycle with a redefined LiveRange::overlap-function. On a multiple-issue cycle, a register that gets killed
can be reused by another MI - these live ranges do
2012 Mar 29
2
[LLVMdev] VLIWPacketizerList: failing to schedule terminators
...lass in order to do pre-RA scheduling.
Thanks,
Tom
-------------- next part --------------
#include "AMDGPU.h"
#include "llvm/PassRegistry.h"
#include "llvm/CodeGen/DFAPacketizer.h"
#include "llvm/CodeGen/LiveIntervalAnalysis.h"
#include "llvm/CodeGen/MachineDominators.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineLoopInfo.h"
using namespace llvm;
namespace {
class R600Packetizer : public VLIWPacketizerList {
public:
R600Packetizer(MachineFunction &MF, MachineLoopInfo &MLI,...
2008 Jan 29
4
[LLVMdev] PassManager Mysteries
On Monday 28 January 2008 09:31:11 pm Owen Anderson wrote:
> From experience, an important point that is often forgotten is that
> the order of declaration of dependencies matter. If you declare that
> you require pass A, and then pass B, and B doesn't preserve A, you'll
> get an error like this.
>
> Just some advice from having had similar problems in the past.
2010 Oct 01
2
[LLVMdev] CMake "sudo make install" & headers
...neBasicBlock.h
-- Installing: /usr/local/llvm-2.8/include/llvm/CodeGen/MachineCodeEmitter.h
-- Installing: /usr/local/llvm-2.8/include/llvm/CodeGen/MachineCodeInfo.h
-- Installing: /usr/local/llvm-2.8/include/llvm/CodeGen/MachineConstantPool.h
-- Installing: /usr/local/llvm-2.8/include/llvm/CodeGen/MachineDominators.h
-- Installing: /usr/local/llvm-2.8/include/llvm/CodeGen/MachineFrameInfo.h
-- Installing: /usr/local/llvm-2.8/include/llvm/CodeGen/MachineFunction.h
-- Installing: /usr/local/llvm-2.8/include/llvm/CodeGen/MachineFunctionAnalysis.h
-- Installing: /usr/local/llvm-2.8/include/llvm/CodeGen/MachineFun...
2012 Jul 16
3
[LLVMdev] RFC: LLVM incubation, or requirements for committing new backends
...;
> +#include "llvm/ADT/SCCIterator.h"
> +#include "llvm/ADT/SmallVector.h"
> +#include "llvm/ADT/Statistic.h"
> +#include "llvm/Analysis/DominatorInternals.h"
> +#include "llvm/Analysis/Dominators.h"
> +#include "llvm/CodeGen/MachineDominators.h"
> +#include "llvm/CodeGen/MachineDominators.h"
> +#include "llvm/CodeGen/MachineFunction.h"
> +#include "llvm/CodeGen/MachineFunctionAnalysis.h"
> +#include "llvm/CodeGen/MachineFunctionPass.h"
> +#include "llvm/CodeGen/MachineFunc...