search for: machinedomin

...rting from the assumption that we'll be moving only the modules that start with 'Machine' into the new library. These are: - MachineBasicBlock - MachineBlockFrequencyInfo - MachineBlockPlacement - MachineBranchProbabilityInfo - MachineCodeEmitter - MachineCopyPropagation - MachineCSE - MachineDominators - MachineFunctionAnalysis - MachineFunction - MachineFunctionPass - MachineFunctionPrinterPass - MachineInstrBundle - MachineInstr - MachineLICM - MachineLoopInfo - MachineModuleInfo - MachineModuleInfoImpls - MachinePassRegistry - MachinePostDominators - MachineRegisterInfo - MachineScheduler...

...ch I am taking. - Currently, I am running the passes in the following order. (-debug-pass=Structure output) Remove unreachable machine basic blocks Live Variable Analysis Eliminate PHI nodes for register allocation Two-Address instruction pass Process Implicit Definitions. MachineDominator Tree Construction Machine Natural Loop Construction Modulo scheduing <== modulo scheduling pass inserted here Slot index numbering Live Interval Analysis MachineDominator Tree Construction Machine Natural Loop Construction Simple Register Coalescing Calculate...

...only the modules > that start with 'Machine' into the new library. These are: > > - MachineBasicBlock > - MachineBlockFrequencyInfo > - MachineBlockPlacement > - MachineBranchProbabilityInfo > - MachineCodeEmitter > - MachineCopyPropagation > - MachineCSE > - MachineDominators > - MachineFunctionAnalysis > - MachineFunction > - MachineFunctionPass > - MachineFunctionPrinterPass > - MachineInstrBundle > - MachineInstr > - MachineLICM > - MachineLoopInfo > - MachineModuleInfo > - MachineModuleInfoImpls > - MachinePassRegistry > - Ma...

...olution Analysis + Loop Pass Manager + Canonicalize natural loops + Induction Variable Users + Loop Strength Reduction + Optimize for code generation + Natural Loop Information + Branch Probability Analysis X86 DAG->DAG Instruction Selection + MachineDominator Tree Construction + Local Dynamic TLS Access Clean-up + Tail Duplication + Optimize machine instruction PHIs + Remove dead machine instructions + MachineDominator Tree Construction + Machine Natural Loop Construction + Machine Loop Invariant Code Motion +...

...) is run. Post RA top-down list latency scheduler Verify generated machine code Analyze Machine Code For Garbage Collection Machine Block Frequency Analysis Branch Probability Basic Block Placement Verify generated machine code Mips Delay Slot Filler MachineDominator Tree Construction Machine Natural Loop Construction Mips Assembly Printer Delete Garbage Collector Information On Tue, Apr 24, 2012 at 11:36 PM, Anton Korobeynikov < anton at korobeynikov.info> wrote: > Hi Akira, > > > When I add -verify-machineinstrs, it c...

On 4/25/2013 12:06 PM, Giacomo Tagliabue wrote: > Thanks, > So, how do I check if a block dominates another one? In IR use analysis DominatorTree from "include/llvm/Analysis/Dominators.h". For machine instructions, use MachineDominatorTree from "include/llvm/CodeGen/MachineDominators.h". Both of them implement function "dominates" that takes two blocks (BasicBlock* or MachineBasicBlock*) and returns a boolean value indicating whether one dominates the other. A block will always dominate itself, so thi...

Thanks, So, how do I check if a block dominates another one? On 25 April 2013 11:59, Krzysztof Parzyszek <kparzysz at codeaurora.org> wrote: > On 4/25/2013 11:52 AM, Giacomo Tagliabue wrote: > >> Is there an easy way to know if, at a certain instruction, a certain >> value is usable or not? i.e., I am sure that if i use that value i don't >> to get the error

...ist latency scheduler > Verify generated machine code > Analyze Machine Code For Garbage Collection > Machine Block Frequency Analysis > Branch Probability Basic Block Placement > Verify generated machine code > Mips Delay Slot Filler > MachineDominator Tree Construction > Machine Natural Loop Construction > Mips Assembly Printer > Delete Garbage Collector Information > > > On Tue, Apr 24, 2012 at 11:36 PM, Anton Korobeynikov < > anton at korobeynikov.info> wrote: > >> Hi Akira, >> &g...

...but perhaps someone has seen this before and can answer. I am trying to add a new register allocator to my target, and would like to use the Strong Phi Elimination pass. I am doing the following in my allocator virtual void getAnalysisUsage(AnalysisUsage &AU) const { AU.addRequiredID(MachineDominatorsID); AU.addRequiredID(StrongPHIEliminationID); // Eliminate PHI nodes AU.addRequired<LiveStacks>(); AU.addPreserved<LiveStacks>(); AU.addRequired<MachineLoopInfo>(); AU.addPreserved<MachineLoopInfo>(); MachineFunctionPass::ge...

Hi Akira, > When I add -verify-machineinstrs, it complains that there are instructions > after terminator instructions. Yes, -verify-machineinstrs and -verify-coalescing are your friends here :) -- With best regards, Anton Korobeynikov Faculty of Mathematics and Mechanics, Saint Petersburg State University

...ora.org> wrote: > On 4/25/2013 12:06 PM, Giacomo Tagliabue wrote: > >> Thanks, >> So, how do I check if a block dominates another one? >> > > In IR use analysis DominatorTree from "include/llvm/Analysis/**Dominators.h". > For machine instructions, use MachineDominatorTree > from "include/llvm/CodeGen/**MachineDominators.h". > > Both of them implement function "dominates" that takes two blocks > (BasicBlock* or MachineBasicBlock*) and returns a boolean value indicating > whether one dominates the other. A block will always...

Hi, guys, what is the interface for finding the immediate dominator of a machine basic block in LLVM 2.1? I found some methods to check if a node dominates other in llvm::MachineDominatorTree, but I was looking for something like: MachineBasicBlock * mbb = ... MachineBasicBlock * iDom = XXX->getImmediateDominator(mbb); is there something similar? best, Fernando

On 23.11.2012, at 15:12, john skaller <skaller at users.sourceforge.net> wrote: > > On 23/11/2012, at 5:46 PM, Sean Silva wrote: > >> Adding LLVMdev, since this is intimately related to the optimization passes. >> >>> I think this is roughly because some function level optimisations are >>> worse than O(N) in the number of instructions. >>

...some core analysis passes. The “Machine” modules you listed above include machine code analysis or transform passes that you probably don’t want. Pruning the list to basic IR support: > >> - MachineBasicBlock >> - MachineBranchProbabilityInfo >> - MachineCodeEmitter >> - MachineDominators >> - MachineFunctionAnalysis >> - MachineFunction >> - MachineFunctionPass >> - MachineFunctionPrinterPass >> - MachineInstrBundle >> - MachineInstr >> - MachineLoopInfo >> - MachineModuleInfo >> - MachineModuleInfoImpls >> - MachineP...

Hi Anton, Thanks for the suggestions. I compiled the .ll file with llc with command line options -verify-dom-info, -verify-regalloc and -verify-loop-info. I didn't see any diagnostic messages. When I add -verify-machineinstrs, it complains that there are instructions after terminator instructions. It seems that these error messages are printed because the verifier does not understand that

...ow? Thanks Jonas On Aug 11, 2010, at 12:14 PM, Akira Hatanaka wrote: > Remove unreachable machine basic blocks > Live Variable Analysis > Eliminate PHI nodes for register allocation > Two-Address instruction pass > Process Implicit Definitions. > MachineDominator Tree Construction > Machine Natural Loop Construction > Modulo scheduing <== modulo scheduling pass inserted here > Slot index numbering > Live Interval Analysis > MachineDominator Tree Construction > Machine Natural Loop Construction > Simpl...

...lass in order to do pre-RA scheduling. Thanks, Tom -------------- next part -------------- #include "AMDGPU.h" #include "llvm/PassRegistry.h" #include "llvm/CodeGen/DFAPacketizer.h" #include "llvm/CodeGen/LiveIntervalAnalysis.h" #include "llvm/CodeGen/MachineDominators.h" #include "llvm/CodeGen/MachineFunctionPass.h" #include "llvm/CodeGen/MachineLoopInfo.h" using namespace llvm; namespace { class R600Packetizer : public VLIWPacketizerList { public: R600Packetizer(MachineFunction &MF, MachineLoopInfo &MLI,...

On Monday 28 January 2008 09:31:11 pm Owen Anderson wrote: > From experience, an important point that is often forgotten is that > the order of declaration of dependencies matter. If you declare that > you require pass A, and then pass B, and B doesn't preserve A, you'll > get an error like this. > > Just some advice from having had similar problems in the past.

...neBasicBlock.h -- Installing: /usr/local/llvm-2.8/include/llvm/CodeGen/MachineCodeEmitter.h -- Installing: /usr/local/llvm-2.8/include/llvm/CodeGen/MachineCodeInfo.h -- Installing: /usr/local/llvm-2.8/include/llvm/CodeGen/MachineConstantPool.h -- Installing: /usr/local/llvm-2.8/include/llvm/CodeGen/MachineDominators.h -- Installing: /usr/local/llvm-2.8/include/llvm/CodeGen/MachineFrameInfo.h -- Installing: /usr/local/llvm-2.8/include/llvm/CodeGen/MachineFunction.h -- Installing: /usr/local/llvm-2.8/include/llvm/CodeGen/MachineFunctionAnalysis.h -- Installing: /usr/local/llvm-2.8/include/llvm/CodeGen/Machi...

...; > +#include "llvm/ADT/SCCIterator.h" > +#include "llvm/ADT/SmallVector.h" > +#include "llvm/ADT/Statistic.h" > +#include "llvm/Analysis/DominatorInternals.h" > +#include "llvm/Analysis/Dominators.h" > +#include "llvm/CodeGen/MachineDominators.h" > +#include "llvm/CodeGen/MachineDominators.h" > +#include "llvm/CodeGen/MachineFunction.h" > +#include "llvm/CodeGen/MachineFunctionAnalysis.h" > +#include "llvm/CodeGen/MachineFunctionPass.h" > +#include "llvm/CodeGen/Machin...