Displaying 7 results from an estimated 7 matches for "machieninstr".
Did you mean:
machieninstrs
2008 Mar 31
5
[LLVMdev] reg_iterator Caveats
...registers. Guh. I'm not sure if it should or not, but it's certainly
>> necessary information in some cases. Is this expected behavior, or an
>> oversight?
reg iterators will return everything that is in the function. If the
implicit operands haven't been added to the machieninstrs yet, then they
won't be returned.
> MachineRegisterInfo tracks virtual register only.
It works for vregs and pregs today.
> I also wish it would track physical register defs and uses as well. It
> can be used to simplify a lot of code (in livevariable, etc.). Chris,
> do you th...
2008 Apr 01
0
[LLVMdev] reg_iterator Caveats
...9;m not sure if it should or not, but it's certainly
> >> necessary information in some cases. Is this expected behavior, or an
> >> oversight?
>
> reg iterators will return everything that is in the function. If the
> implicit operands haven't been added to the machieninstrs yet, then they
> won't be returned.
Hmm...this is definitely NOT true in my copy. During register allocation
these implicit defs are not returned. By then the instructions are most
definitely fully constructed. :)
We have a very old copy of llvm. Is it possible they got added sometime...
2008 Apr 01
2
[LLVMdev] reg_iterator Caveats
On Tuesday 01 April 2008 10:47, David Greene wrote:
> > reg iterators will return everything that is in the function. If the
> > implicit operands haven't been added to the machieninstrs yet, then they
> > won't be returned.
>
> Hmm...this is definitely NOT true in my copy. During register allocation
> these implicit defs are not returned. By then the instructions are most
> definitely fully constructed. :)
Urk. It seems things are worse than that, even....
2008 Apr 01
0
[LLVMdev] reg_iterator Caveats
On Tue, 1 Apr 2008, David Greene wrote:
> On Tuesday 01 April 2008 10:47, David Greene wrote:
>>> reg iterators will return everything that is in the function. If the
>>> implicit operands haven't been added to the machieninstrs yet, then they
>>> won't be returned.
>>
>> Hmm...this is definitely NOT true in my copy. During register allocation
>> these implicit defs are not returned. By then the instructions are most
>> definitely fully constructed. :)
>
> Urk. It seems thing...
2008 Mar 31
0
[LLVMdev] reg_iterator Caveats
On Mar 31, 2008, at 2:53 PM, David Greene wrote:
> On Monday 31 March 2008 00:57, Chris Lattner wrote:
>> On Mar 30, 2008, at 10:42 PM, David A. Greene wrote:
>>>> SSA form, it is reasonable to say "give me the first def" and
>>>> expect
>>>> it to be the only def. For multiply defined values like physregs,
>>>> this is not
2008 Apr 01
0
[LLVMdev] reg_iterator Caveats
...not, but it's
>>> certainly
>>> necessary information in some cases. Is this expected behavior,
>>> or an
>>> oversight?
>
> reg iterators will return everything that is in the function. If the
> implicit operands haven't been added to the machieninstrs yet, then
> they
> won't be returned.
>
>> MachineRegisterInfo tracks virtual register only.
>
> It works for vregs and pregs today.
Ok! Fooled me with this comment:
/// MachineRegisterInfo - Keep track of information for each virtual
register,
/// including its regi...
2008 Mar 31
2
[LLVMdev] reg_iterator Caveats
On Monday 31 March 2008 00:57, Chris Lattner wrote:
> On Mar 30, 2008, at 10:42 PM, David A. Greene wrote:
> >> SSA form, it is reasonable to say "give me the first def" and expect
> >> it to be the only def. For multiply defined values like physregs,
> >> this is not true, because the reg can have multiple defs.
> >
> > Gotcha. This is exactly