Displaying 1 result from an estimated 1 matches for "m819inst".
2013 Mar 20
2
[LLVMdev] Strange spill behaviour
...ing convention states R0-R3 are used as inputs to
a function. R1-R4 are marked as calleesaved. From the above code I cannot
see any reason why R1 & R2 are being spilled, I assume the fault lies in my
tablegen definitions (relevant ones reproduced below) :
let isCommutable=1 in
{
def ADD32rrr : M819Inst<(outs GR32:$dst),(ins GR32:$src1,
GR32:$src2),"ADD.L\t{$dst,$src1 + $src2}",[(set GR32:$dst, (add GR32:$src1,
GR32:$src2))]>;
}
def ADD32rri : M819Inst<(outs GR32:$dst),(ins GR32:$src1,
i32imm:$src2),"ADD.L\t{$dst,$src1 + $src2}",[(set GR32:$dst, (add
GR32:$src1, imm:$s...