Displaying 1 result from an estimated 1 matches for "m68kdatareg".
2013 Jan 11
2
[LLVMdev] Sub-Register Allocation
...3.2 release, if it matters. I'm mostly
looking for where to look to understand what's going on and/or extra
documentation on how subregisters work inside the instruction and registers
selectors.
Thank you,
-- Kenneth Waters
P.S. If it helps, my register definitions look like,
multiclass M68kDataReg<bits<3> num, string defn, string n> {
def B : M68kReg<num, n>;
def W : M68kRegWithSubregs<num, n, [!cast<Register>(defn # "B")]> {
let SubRegIndices = [sub_byte];
}
def L : M68kRegWithSubregs<num, n, [!cast<Register>(defn # "W")...