search for: lytton

...nly affect the XCore target and only if there is a good reason why the XCore requires the change. So, is #ifdef around all/most changes the correct way to submit a patch? Robert ________________________________ From: Eric Christopher [echristo at gmail.com] Sent: 13 January 2014 20:24 To: Robert Lytton; llvmdev at cs.uiuc.edu Subject: RE: [LLVMdev] test suite 'owner' The idea is that it's going to be a correct and portable set of code that works both as a correctness and performance test suite. -eric On Mon Jan 13 2014 at 12:22:51 PM, Robert Lytton <robert at xmos.com<mailto:...

...ally, applications would use either stdout or stderr but not both. Would a patch to change to only stdout be acceptable (plus any changes to expected output)? Thank you Robert ________________________________ From: Eric Christopher [echristo at gmail.com] Sent: 13 January 2014 19:16 To: Robert Lytton; llvmdev at cs.uiuc.edu Subject: [LLVMdev] test suite 'owner' Some of these are pretty weird, e.g. int32_t main. Probably the best thing is to submit each patch individually with an explanation of what the purpose is and we can talk about them then. -eric On Fri Jan 10 2014 at 4:13:47 A...

thank you. I'll submit the patch without #ifdef in this case. Robert ________________________________ From: dblaikie at gmail.com [dblaikie at gmail.com] Sent: 14 January 2014 17:03 To: Robert Lytton; echristo at gmail.com; llvmdev at cs.uiuc.edu Subject: Re: [LLVMdev] test suite 'owner' On Mon Jan 13 2014 at 12:25:14 PM, Robert Lytton <robert at xmos.com<mailto:robert at xmos.com>> wrote: Hi Eric, Could you explain the intent and policy regarding the test-suite body of...

On 26 February 2014 14:44, Robert Lytton <robert at xmos.com> wrote: > This is related to a patch I submitted a little while ago (still pending): > http://llvm-reviews.chandlerc.com/D2760 > > If accepted, would it make this patch (and a others) unnecessary? Hi Robert, It is, but hijacking your patch a little, why not...

...: Richard Seibt >>> >>> European Office: >>> Open-Xchange GmbH, Olper Huette 5f, D-57462 Olpe, Germany, District >>> Court Siegen, HRB 8718 >>> Managing Director: Frank Hoberg >>> >>> US Office: >>> Open-Xchange. Inc., 530 Lytton Avenue, Palo Alto, CA 94301, USA >>> ------------------------------------------------------------------------------------- >>> >> >> >> Neil Cook >> neil.cook at open-xchange.com <mailto:neil.cook at open-xchange.com> <mailto:neil.cook at open-...

...Dirks, Michael Knapstein, Stephan Martin > Chairman of the Board: Richard Seibt > > European Office: > Open-Xchange GmbH, Olper Huette 5f, D-57462 Olpe, Germany, District Court Siegen, HRB 8718 > Managing Director: Frank Hoberg > > US Office: > Open-Xchange. Inc., 530 Lytton Avenue, Palo Alto, CA 94301, USA > ------------------------------------------------------------------------------------- > Neil Cook neil.cook at open-xchange.com <mailto:neil.cook at open-xchange.com> --------------------------------------------------------------------------------...

...pied data. Thus, must *all* byVal attributes be replaced in the IR? I need to do more reading about other attributes and get more familiar with the IR in general... robert ________________________________________ From: Tim Northover [t.p.northover at gmail.com] Sent: 05 July 2013 07:43 To: Robert Lytton Cc: <llvmdev at cs.uiuc.edu> Subject: Re: [LLVMdev] making a copy of a byval aggregate on the callee's frame Hi Robert, > This should ideally be done early on in the IR in my thinking - to allow optimisation if the data is only ever read. I've thought that once or twice when dea...

...Setup ^ | I have attached a patch that adds a check for this situation in PrescheduleNodesWithMultipleUses. Comments please! Robert ________________________________ From: llvmdev-bounces at cs.uiuc.edu [llvmdev-bounces at cs.uiuc.edu] on behalf of Robert Lytton [robert at xmos.com] Sent: 21 August 2013 11:02 To: llvmdev at cs.uiuc.edu Subject: Re: [LLVMdev] PrescheduleNodesWithMultipleUses() causing failure in PickNodeToScheduleBottomUp() ??? Here is a bit more data. After PrescheduleNodesWithMultipleUses has been run, the following Predecessor/Successor...

On Thu, Aug 22, 2013 at 4:15 AM, Robert Lytton <robert at xmos.com> wrote: > > > Outstanding issues > ============ > > 1. Is it too aggressive in searching predecessors and successors? > Should the algorithm give up and assume the worst if the depth of > search reaches a predefined limit? > > 2. Should th...

Hello all. At XMOS we are working towards updating the upstream XCore backend for newer versions of the chip. XCore is the XMOS processor. The XCore backend was written by Richard Osborne at XMOS. Richard has moved on. The current code owner in CODE_OWNERS.TXT, Robert Lytton, has also moved on. For some years XMOS has developed the compiler in-house, for new versions of the chip, but not upstreamed the changes. We are currently integrating the upstream changes into the shipping compiler, following the LLVM coding standards. We would like to upstream when possible, but...

...llee. The callee allocates memory on the stack, writes the contents of the registers to it (thus reconstructing *%X), and places the address of the memory in %Y. Which method is used should be specified by the platform ABI. For example, what does GCC do? Ciao, Duncan. On 05/07/13 09:52, Robert Lytton wrote: > Hi Tim, > > Thought about it last night and was coming to the same conclusion. > 1. it cant be done at the end during lowering (target backend). > 2. it should be part of llvm as the byVal needs to be handled. > > As a twist, I have been told that llvm-gcc can lower by...

...D=8] 0x2689e80: i32 = Constant<0> [ID=5] 0x268c1b0: ch = seteq [ID=2] 0x268a880: i32 = setcc 0x268bdb0, 0x2689e80, 0x268c1b0 [ORD=6] [ID=9] Robert ________________________________ From: llvmdev-bounces at cs.uiuc.edu [llvmdev-bounces at cs.uiuc.edu] on behalf of Robert Lytton [robert at xmos.com] Sent: 06 September 2013 17:18 To: llvmdev at cs.uiuc.edu Subject: [LLVMdev] removing unnecessary ZEXT Hi, Within a basic block I can remove unnecessary register copies + zero sign extensions of unsigned-8bit-loaded values by implementing isZExtFree() for ISD::LOAD nodes. ......

Hi, Within a basic block I can remove unnecessary register copies + zero sign extensions of unsigned-8bit-loaded values by implementing isZExtFree() for ISD::LOAD nodes. ...But not between basic blocks. The first block does a CopyFromReg of the unsigned-8bit-loaded vreg1 into a new vreg2. The second block then does a unnecessary zext to vreg2. What I want is the 2nd block to use the original

Hi I have brought everything together in this email. The problem ======== Take the following DAG (arrow to predecessor): SetUp2 SetUp1 ^ ^ | | | | Destroy2---->PredSU <----SU ^ ^ ^ | | | | | | ----------- | ---------

Hi, I have found it necessary to make some changes to the test-suite for the XCore platform. These changes include: altering #includes, as supported by XCore; using stdout or stderr to make the output diffs consistent (fixing expected output too); (This work is still under review as best way to do it) 'fixing' symbol and type problems e.g name clashes & scope;

sorry, Just noticed that the diagrams have 'Destroy' & 'SetUp' the wrong way around! Robert ________________________________ From: llvmdev-bounces at cs.uiuc.edu [llvmdev-bounces at cs.uiuc.edu] on behalf of Robert Lytton [robert at xmos.com] Sent: 21 August 2013 18:34 To: llvmdev at cs.uiuc.edu Subject: Re: [LLVMdev] PrescheduleNodesWithMultipleUses() causing failure in PickNodeToScheduleBottomUp() ??? Hi, I have reasoned through and believe the problem is with the PrescheduleNodesWithMultipleUses. Take the foll...

...U(8) 1 0 So, the problem comes back to trying to find the physical address of a 'CallResource' in the later part of PickNodeToScheduleBottomUp(). Robert ________________________________ From: llvmdev-bounces at cs.uiuc.edu [llvmdev-bounces at cs.uiuc.edu] on behalf of Robert Lytton [robert at xmos.com] Sent: 20 August 2013 22:57 To: llvmdev at cs.uiuc.edu Subject: [LLVMdev] PrescheduleNodesWithMultipleUses() causing failure in PickNodeToScheduleBottomUp() ??? Hi, I have an assert firing due to PickNodeToScheduleBottomUp(): 1. having a CallResource in use pushing an inte...

...in? >> Chairman of the Board: Richard Seibt >> >> European Office:? >> Open-Xchange GmbH, Olper Huette 5f,?D-57462 Olpe, Germany, District >> Court?Siegen, HRB 8718? >> Managing Director: Frank Hoberg >> >> US Office:? >> Open-Xchange. Inc., 530 Lytton Avenue,?Palo Alto, CA 94301, USA? >> ------------------------------------------------------------------------------------- >> > > > Neil Cook > neil.cook at open-xchange.com <mailto:neil.cook at open-xchange.com> > > -------------------------------------------...

...Dirks, Michael Knapstein, Stephan Martin > Chairman of the Board: Richard Seibt > > European Office: > Open-Xchange GmbH, Olper Huette 5f, D-57462 Olpe, Germany, District Court Siegen, HRB 8718 > Managing Director: Frank Hoberg > > US Office: > Open-Xchange. Inc., 530 Lytton Avenue, Palo Alto, CA 94301, USA > ------------------------------------------------------------------------------------- > >

Hi, I have an assert firing due to PickNodeToScheduleBottomUp(): 1. having a CallResource in use pushing an interference of current SUnit. 2. having no more SUnits in the AvailableQueue 3. The only interference being the SUnit that just failed due to a Call Resource. 4. An attempt to duplicate this node which has the 'Call Resource' as a physical register. Thus the call