search for: ltmp4

...I use a custom calling convention in which the first 4 arguments are promoted to registers and the rest to the stack, and the callee is responsible for popping the stack arguments. So when calling a function with 5 arguments i get this code: movq ARG_5, (%rsp) callq fun_foo_1 .Ltmp4: subq $8, %rsp I use a garbage collector with postcall safe points (.Ltmp4 is such) which needs to know the frame size, for each safe point. The problem is that at .Ltmp4 the frame size is actually different from what getFrameSize() would return. So is there a way to force generation o...

...%rbx > .Ltmp6: > .cfi_def_cfa_offset 16 > .Ltmp7: > .cfi_offset %rbx, -16 > movq %rdi, %rbx > .Ltmp0: > callq *%rbx > .Ltmp1: > # BB#1: # %_Z4testPFvvE.exit > .Ltmp3: > callq *%rbx > .Ltmp4: > # BB#2: # %_Z4testPFvvE.exit3 > popq %rbx > retq > .LBB0_3: # %terminate.lpad.i > .Ltmp2: > movq %rax, %rdi > callq __clang_call_terminate > .LBB0_4:...

Hi I use BlockAddress to get the address of BasicBlock , and I use GlobalVariable 's getInitializer() to pass the address of BasicBlock to the global variable of my own program and then I print it out. But , I found that BlockAddress is not always correct. For example, some function's rsp (stack pointer) or other register is maintained by caller, so it would be like:

...ign 16, 0x90 .type _fun1, at function _fun1: # @_fun1 .cfi_startproc # BB#0: # %_L1 pushq %rbp .Ltmp2: .cfi_def_cfa_offset 16 .Ltmp3: .cfi_offset %rbp, -16 movq %rsp, %rbp .Ltmp4: .cfi_def_cfa_register %rbp vmovaps (%rdi), %ymm0 vaddps (%rsi), %ymm0, %ymm0 vmovaps %ymm0, (%rdi) popq %rbp vzeroupper ret .Ltmp5: .size _fun1, .Ltmp5-_fun1 .cfi_endproc .section ".note.G...

...function > _fun1: # @_fun1 > .cfi_startproc > # BB#0: # %_L1 > pushq %rbp > .Ltmp2: > .cfi_def_cfa_offset 16 > .Ltmp3: > .cfi_offset %rbp, -16 > movq %rsp, %rbp > .Ltmp4: > .cfi_def_cfa_register %rbp > vmovaps (%rdi), %ymm0 > vaddps (%rsi), %ymm0, %ymm0 > vmovaps %ymm0, (%rdi) > popq %rbp > vzeroupper > ret > .Ltmp5: > .size _fun1, .Ltmp5-_fun1 > .cfi_endproc > &gt...

...> ====== > .section __TEXT,__text,regular,pure_instructions > .globl _rotr > _rotr: ## @rotr > .cfi_startproc > ## BB#0: > pushq %rbp > Ltmp2: > .cfi_def_cfa_offset 16 > Ltmp3: > .cfi_offset %rbp, -16 > movq %rsp, %rbp > Ltmp4: > .cfi_def_cfa_register %rbp > movb %sil, %cl > rorl %cl, %edi<==== Rotate instruction > movl %edi, %eax > popq %rbp > ret > .cfi_endproc > .subsections_via_symbols > ====== > > I hope this helps. > > Michael > > On Jul 28, 2012, at 8:29 PM, r...

...OOT ror.c -c -S -Os -o - ====== yielding an assembly output of: ====== .section __TEXT,__text,regular,pure_instructions .globl _rotr _rotr: ## @rotr .cfi_startproc ## BB#0: pushq %rbp Ltmp2: .cfi_def_cfa_offset 16 Ltmp3: .cfi_offset %rbp, -16 movq %rsp, %rbp Ltmp4: .cfi_def_cfa_register %rbp movb %sil, %cl rorl %cl, %edi <==== Rotate instruction movl %edi, %eax popq %rbp ret .cfi_endproc .subsections_via_symbols ====== I hope this helps. Michael On Jul 28, 2012, at 8:29 PM, reed kotler <rkotler at mips.com> wro...

...vstore.ll creates: .section __TEXT,__text,regular,pure_instructions .globl _vstore .align 4, 0x90 _vstore: ## @vstore .cfi_startproc ## BB#0: ## %entry pushq %rbp Ltmp2: .cfi_def_cfa_offset 16 Ltmp3: .cfi_offset %rbp, -16 movq %rsp, %rbp Ltmp4: .cfi_def_cfa_register %rbp vmovups (%rdi), %ymm0 popq %rbp ret .cfi_endproc ---------------------------------------------------------------- Running llvm-33/bin/llc vstore.ll creates: .section __TEXT,__text,regular,pure_instructions .globl _main .align 4, 0x90 _mai...

in C or C++, how can I get clang/llvm to try and do a "rotate". (want to test this code in the mips16 port) i.e. emit rotr node. tia. reed

...which passes the argument on the stack. The callee, however, begins with __Z14convert_char16Dv16_s: ## @_Z14convert_char16Dv16_s .cfi_startproc ## BB#0: ## %entry pushq %rbp Ltmp2: .cfi_def_cfa_offset 16 Ltmp3: .cfi_offset %rbp, -16 movq %rsp, %rbp Ltmp4: .cfi_def_cfa_register %rbp vextractf128 $1, %ymm0, %xmm1 which expects the argument in %ymm0. However, the vzeroupper in the caller just destroyed part of %ymm0... My question is: What decides this calling convention? I know that standard x86-64 should pass arguments in %xmm0, not %ymm0. Are...

...best way? In this case that is not encoded because what is encoded is that the call frame in that region is rbp. Without a frame pointer, compiling void f(void *); void g(void) { f(alloca(100)); } produces pushq %rbx Ltmp2: .cfi_def_cfa_offset 16 subq $112, %rsp Ltmp3: .cfi_def_cfa_offset 128 Ltmp4: .cfi_offset %rbx, -16 Which does contain the rsp updates. The two places I can think with some documentation are http://www.dwarfstd.org/doc/DWARF4.pdf (the 6.4 Call Frame Information section). This is the old .debug_frame, but that is where the idea came from. http://refspecs.linuxfoundation.o...

...fts and on intel shifts are mod the register size: ===== .section __TEXT,__text,regular,pure_instructions .globl _ror .align 4, 0x90 _ror: ## @ror .cfi_startproc ## BB#0: pushq %rbp Ltmp2: .cfi_def_cfa_offset 16 Ltmp3: .cfi_offset %rbp, -16 movq %rsp, %rbp Ltmp4: .cfi_def_cfa_register %rbp movl %edi, -4(%rbp) movq %rsi, -16(%rbp) movl -4(%rbp), %edi movq -16(%rbp), %rsi movl %esi, %eax movl %eax, %ecx ## kill: CL<def> ECX<kill> shrl %cl, %edi movl -4(%rbp), %eax movabsq $32, %rsi subq -16(%rbp)...

Hi Rafael, I've been staring at the CFI directives and have a question. Some background: I want to generate the compact unwind information using just the CFI directives. I *think* that this should be doable. The issue I'm facing right now is that I need to know how much the stack pointer was adjusted. So when I have something like this: .cfi_startproc Lfunc_begin175:

...## <MCOperand Reg:106>> Ltmp2: .cfi_def_cfa_offset 16 Ltmp3: .cfi_offset %rbp, -16 movq %rsp, %rbp ## <MCInst #1491 MOV64rr ## <MCOperand Reg:106> ## <MCOperand Reg:114>> Ltmp4: .cfi_def_cfa_register %rbp movq %rdi, -8(%rbp) ## <MCInst #1482 MOV64mr ## <MCOperand Reg:106> ## <MCOperand Imm:1> ## <MCOperand Reg:0>...

...e ssp { ret i48 3 } steve$ clang -S a.ll steve$ cat a.s .section __TEXT,__text,regular,pure_instructions .globl _foo .align 4, 0x90 _foo: ## @foo .cfi_startproc ## BB#0: pushq %rbp Ltmp2: .cfi_def_cfa_offset 16 Ltmp3: .cfi_offset %rbp, -16 movq %rsp, %rbp Ltmp4: .cfi_def_cfa_register %rbp movl $3, %eax popq %rbp ret .cfi_endproc .subsections_via_symbols As you can see, i48 was a perfectly valid LLVM type. Without having written a backend, I'd imagine you specify what types are legal and then either generic code or target-dependent code is goi...

...ith: *** Bad machine code: MBB exits via unconditional branch but doesn't have exactly one CFG successor! *** - function: t4 - basic block: BB#5 invoke.cont41 The freshly selected relevant blocks are: BB#7: derived from LLVM BB %invoke.cont41 EH_LABEL <MCSym=Ltmp4> B <BB#8> Successors according to CFG: BB#8(1) BB#9(1) BB#8: derived from LLVM BB %invoke.cont43 Predecessors according to CFG: BB#7 BB#9: derived from LLVM BB %lpad40, EH LANDING PAD Predecessors according to CFG: BB#7 EH_LABEL &lt...

Hi, LLVM only support primitive type i32 and i64, no i48. The clang translate "C int type" to i32 too. My question is if a cpu is 48 bits register size, how to write the backend for 48 bits register architecture. Can someone help me with this problem? Jonathan -------------- next part -------------- An HTML attachment was scrubbed... URL:

...14d, %r15d ## InlineAsm End retq .cfi_endproc .globl _bar .p2align 4, 0x90 _bar: ## @bar .cfi_startproc ## BB#0: pushq %r15 Ltmp0: .cfi_def_cfa_offset 16 pushq %rbx Ltmp1: .cfi_def_cfa_offset 24 pushq %rax Ltmp2: .cfi_def_cfa_offset 32 Ltmp3: .cfi_offset %rbx, -24 Ltmp4: .cfi_offset %r15, -16 ## InlineAsm Start movl %ecx, %r15d ## InlineAsm End callq _foo ## InlineAsm Start movl %r15d, %ebx ## InlineAsm End addq $8, %rsp popq %rbx popq %r15 retq .cfi_endproc .subsections_via_symbols now foo clobbers R15 (which is callee saved) but as foo is local function IPRA...

Hi, In GCC there is one useful option -dp (or -dP for more verbose output) to annotate assembler with instruction patterns, that was used when assembler was generated. For example: double test(long long s) { return s; } gcc -S -dp -O0 test.c test: .LFB0: .cfi_startproc pushq %rbp # 18 *pushdi2_rex64/1 [length = 1] .cfi_def_cfa_offset 16 movq %rsp, %rbp # 19 *movdi_1_rex64/2

...e_instructions .globl _f .align 4, 0x90 _f: ## @f .cfi_startproc ## BB#0: ## %entry pushq %rbp Ltmp2: .cfi_def_cfa_offset 16 Ltmp3: .cfi_offset %rbp, -16 movq %rsp, %rbp Ltmp4: .cfi_def_cfa_register %rbp xorl %eax, %eax .align 4, 0x90 LBB0_1: ## %vector.body ## =>This Inner Loop Header: Depth=1 vmovups (%rdx,%rax,4), %ymm0 vmulps (%rsi,%rax,4), %ymm0, %...