Displaying 20 results from an estimated 46 matches for "ltmp3".
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2013 Sep 20
2
[LLVMdev] LLVM ERROR: expected relocatable expression
This example generates the following error:
.Ltmp3:
.Ltmp5:
.Ltmp13:
.word (.Ltmp5-.Ltmp3)-.Ltmp13
./llvm-mc ex.s -filetype=obj
LLVM ERROR: expected relocatable expression when using:
--
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2014 May 11
2
[LLVMdev] [cfe-dev] Code generation for noexcept functions
...# %entry
> pushq %rbx
> .Ltmp6:
> .cfi_def_cfa_offset 16
> .Ltmp7:
> .cfi_offset %rbx, -16
> movq %rdi, %rbx
> .Ltmp0:
> callq *%rbx
> .Ltmp1:
> # BB#1: # %_Z4testPFvvE.exit
> .Ltmp3:
> callq *%rbx
> .Ltmp4:
> # BB#2: # %_Z4testPFvvE.exit3
> popq %rbx
> retq
> .LBB0_3: # %terminate.lpad.i
> .Ltmp2:
> movq %rax, %rdi
> callq __clang_call_ter...
2013 Sep 20
0
[LLVMdev] LLVM ERROR: expected relocatable expression
On Fri, Sep 20, 2013 at 2:50 PM, Sid Manning <sidneym at codeaurora.org> wrote:
>
> This example generates the following error:
> .Ltmp3:
> .Ltmp5:
> .Ltmp13:
> .word (.Ltmp5-.Ltmp3)-.Ltmp13
>
> ./llvm-mc ex.s -filetype=obj
> LLVM ERROR: expected relocatable expression when using:
>
>
Umm, isn't this equivalent to the following? What do you expect LLVM to do
with it?
.Ltmp13:
.word -.Ltmp1...
2013 Sep 22
2
[LLVMdev] LLVM ERROR: expected relocatable expression
On 09/20/2013 06:00 PM, Eli Friedman wrote:
> On Fri, Sep 20, 2013 at 2:50 PM, Sid Manning <sidneym at codeaurora.org
> <mailto:sidneym at codeaurora.org>> wrote:
>
>
> This example generates the following error:
> .Ltmp3:
> .Ltmp5:
> .Ltmp13:
> .word (.Ltmp5-.Ltmp3)-.Ltmp13
>
> ./llvm-mc ex.s -filetype=obj
> LLVM ERROR: expected relocatable expression when using:
>
>
> Umm, isn't this equivalent to the following? What do you expect LLVM to
> do with...
2020 Feb 28
2
Is BlockAddress always correct ?
Hi
I use BlockAddress to get the address of BasicBlock ,
and I use GlobalVariable 's getInitializer()
to pass the address of BasicBlock to the global variable of my own program
and then I print it out.
But , I found that BlockAddress is not always correct.
For example, some function's rsp (stack pointer) or other register is
maintained by caller,
so it would be like:
2012 May 24
4
[LLVMdev] use AVX automatically if present
...uot;avx.ll"
.text
.globl _fun1
.align 16, 0x90
.type _fun1, at function
_fun1: # @_fun1
.cfi_startproc
# BB#0: # %_L1
pushq %rbp
.Ltmp2:
.cfi_def_cfa_offset 16
.Ltmp3:
.cfi_offset %rbp, -16
movq %rsp, %rbp
.Ltmp4:
.cfi_def_cfa_register %rbp
vmovaps (%rdi), %ymm0
vaddps (%rsi), %ymm0, %ymm0
vmovaps %ymm0, (%rdi)
popq %rbp
vzeroupper
ret
.Ltmp5:
.size _fun1, .Ltmp5-_...
2012 May 24
0
[LLVMdev] use AVX automatically if present
....globl _fun1
> .align 16, 0x90
> .type _fun1, at function
> _fun1: # @_fun1
> .cfi_startproc
> # BB#0: # %_L1
> pushq %rbp
> .Ltmp2:
> .cfi_def_cfa_offset 16
> .Ltmp3:
> .cfi_offset %rbp, -16
> movq %rsp, %rbp
> .Ltmp4:
> .cfi_def_cfa_register %rbp
> vmovaps (%rdi), %ymm0
> vaddps (%rsi), %ymm0, %ymm0
> vmovaps %ymm0, (%rdi)
> popq %rbp
> vzeroupper
> ret
> .Lt...
2010 Aug 27
0
[LLVMdev] What does this error mean: psuedo instructions should be removed before code emission?
...er emitEpilogue
for this function:
* PEI::insertPrologEpilogCode: === >> before emitEpilogue
- insn: PUSH64r %RBP<kill>, %RSP<imp-def>, %RSP<imp-use>
- insn: PROLOG_LABEL <MCSym=.Ltmp2>
- insn: %RBP<def> = MOV64rr %RSP
- insn: PROLOG_LABEL <MCSym=.Ltmp3>
- insn: %RDI<def> = MOV64ri64i32 60910096
- insn: %RAX<def> = MOV64ri
<ga:@_ZN010HelloWorld4mainEPN13ContainerSVecE>
- insn: TCRETURNri64 %RAX<kill>, 0, %RDI<kill>, %RAX<imp-def,dead>,
%RDI<imp-def,dead>, %RSP<imp-use>, ...
- insn: R...
2010 Aug 26
2
[LLVMdev] What does this error mean: psuedo instructions should be removed before code emission?
On Aug 26, 2010, at 12:59 PMPDT, Eric Christopher wrote:
> On Aug 26, 2010, at 12:25 PM, Yuri wrote:
>> On 08/26/2010 11:53, Eric Christopher wrote:
>>> Could you get it to print out the instruction when it happens?
>>> (just change the line above the error message to print it out to
>>> errs()).
>>>
>>> It basically means that a pseudo
2012 Jul 29
3
[LLVMdev] rotate
...Os -o -
> ======
>
> yielding an assembly output of:
> ======
> .section __TEXT,__text,regular,pure_instructions
> .globl _rotr
> _rotr: ## @rotr
> .cfi_startproc
> ## BB#0:
> pushq %rbp
> Ltmp2:
> .cfi_def_cfa_offset 16
> Ltmp3:
> .cfi_offset %rbp, -16
> movq %rsp, %rbp
> Ltmp4:
> .cfi_def_cfa_register %rbp
> movb %sil, %cl
> rorl %cl, %edi<==== Rotate instruction
> movl %edi, %eax
> popq %rbp
> ret
> .cfi_endproc
> .subsections_via_symbols
> ======
>
> I hope this hel...
2010 Aug 27
2
[LLVMdev] What does this error mean: psuedo instructions should be removed before code emission?
...for this function:
> * PEI::insertPrologEpilogCode: === >> before emitEpilogue
> - insn: PUSH64r %RBP<kill>, %RSP<imp-def>, %RSP<imp-use>
> - insn: PROLOG_LABEL <MCSym=.Ltmp2>
> - insn: %RBP<def> = MOV64rr %RSP
> - insn: PROLOG_LABEL <MCSym=.Ltmp3>
> - insn: %RDI<def> = MOV64ri64i32 60910096
> - insn: %RAX<def> = MOV64ri
> <ga:@_ZN010HelloWorld4mainEPN13ContainerSVecE>
> - insn: TCRETURNri64 %RAX<kill>, 0, %RDI<kill>, %RAX<imp-def,dead>,
> %RDI<imp-def,dead>, %RSP<imp-use&...
2014 Mar 14
3
[LLVMdev] [ARM] [PIC] optimizing the loading of hidden global variable
>> Any thoughs?
>
> I'm now struggling to see how GCC justifies it. What if a different
> translation-unit declared those variables in a different order? I also
> can't get the same behaviour here, do you have a more complete
> command-line?
Ah, I see; the translation-unit that does the optimisation needs to
have them as a definition (i.e. "= {0}") rather
2013 Sep 22
0
[LLVMdev] LLVM ERROR: expected relocatable expression
...t;wrote:
> On 09/20/2013 06:00 PM, Eli Friedman wrote:
>
>> On Fri, Sep 20, 2013 at 2:50 PM, Sid Manning <sidneym at codeaurora.org
>> <mailto:sidneym at codeaurora.org**>> wrote:
>>
>>
>> This example generates the following error:
>> .Ltmp3:
>> .Ltmp5:
>> .Ltmp13:
>> .word (.Ltmp5-.Ltmp3)-.Ltmp13
>>
>> ./llvm-mc ex.s -filetype=obj
>> LLVM ERROR: expected relocatable expression when using:
>>
>>
>> Umm, isn't this equivalent to the following? What...
2012 Jul 29
0
[LLVMdev] rotate
...X10.8.sdk
$(xcrun -find clang) -isysroot $ISYSROOT ror.c -c -S -Os -o -
======
yielding an assembly output of:
======
.section __TEXT,__text,regular,pure_instructions
.globl _rotr
_rotr: ## @rotr
.cfi_startproc
## BB#0:
pushq %rbp
Ltmp2:
.cfi_def_cfa_offset 16
Ltmp3:
.cfi_offset %rbp, -16
movq %rsp, %rbp
Ltmp4:
.cfi_def_cfa_register %rbp
movb %sil, %cl
rorl %cl, %edi <==== Rotate instruction
movl %edi, %eax
popq %rbp
ret
.cfi_endproc
.subsections_via_symbols
======
I hope this helps.
Michael
On Jul 28, 2012, at 8:29...
2013 Jul 10
4
[LLVMdev] unaligned AVX store gets split into two instructions
...--------------------
Running llvm-32/bin/llc vstore.ll creates:
.section __TEXT,__text,regular,pure_instructions
.globl _vstore
.align 4, 0x90
_vstore: ## @vstore
.cfi_startproc
## BB#0: ## %entry
pushq %rbp
Ltmp2:
.cfi_def_cfa_offset 16
Ltmp3:
.cfi_offset %rbp, -16
movq %rsp, %rbp
Ltmp4:
.cfi_def_cfa_register %rbp
vmovups (%rdi), %ymm0
popq %rbp
ret
.cfi_endproc
----------------------------------------------------------------
Running llvm-33/bin/llc vstore.ll creates:
.section __TEXT,__text,regular,pure_instructions...
2012 Jul 29
2
[LLVMdev] rotate
in C or C++, how can I get clang/llvm to try and do a "rotate".
(want to test this code in the mips16 port)
i.e. emit rotr node.
tia.
reed
2013 Sep 05
1
[LLVMdev] AVX calling convention?
...)
vzeroupper
callq __Z14convert_char16Dv16_s
which passes the argument on the stack. The callee, however, begins with
__Z14convert_char16Dv16_s: ## @_Z14convert_char16Dv16_s
.cfi_startproc
## BB#0: ## %entry
pushq %rbp
Ltmp2:
.cfi_def_cfa_offset 16
Ltmp3:
.cfi_offset %rbp, -16
movq %rsp, %rbp
Ltmp4:
.cfi_def_cfa_register %rbp
vextractf128 $1, %ymm0, %xmm1
which expects the argument in %ymm0. However, the vzeroupper in the caller just destroyed part of %ymm0...
My question is:
What decides this calling convention? I know that standard x86-64...
2013 Sep 06
0
[LLVMdev] CFI Directives
...r if it can be, what's the best way?
In this case that is not encoded because what is encoded is that the
call frame in that region is rbp. Without a frame pointer, compiling
void f(void *);
void g(void) {
f(alloca(100));
}
produces
pushq %rbx
Ltmp2:
.cfi_def_cfa_offset 16
subq $112, %rsp
Ltmp3:
.cfi_def_cfa_offset 128
Ltmp4:
.cfi_offset %rbx, -16
Which does contain the rsp updates. The two places I can think with
some documentation are
http://www.dwarfstd.org/doc/DWARF4.pdf (the 6.4 Call Frame Information
section). This is the old .debug_frame, but that is where the idea
came from.
ht...
2012 Jul 29
0
[LLVMdev] rotate
...ield the wrong result since clang will emit shifts and on intel shifts are mod the register size:
=====
.section __TEXT,__text,regular,pure_instructions
.globl _ror
.align 4, 0x90
_ror: ## @ror
.cfi_startproc
## BB#0:
pushq %rbp
Ltmp2:
.cfi_def_cfa_offset 16
Ltmp3:
.cfi_offset %rbp, -16
movq %rsp, %rbp
Ltmp4:
.cfi_def_cfa_register %rbp
movl %edi, -4(%rbp)
movq %rsi, -16(%rbp)
movl -4(%rbp), %edi
movq -16(%rbp), %rsi
movl %esi, %eax
movl %eax, %ecx
## kill: CL<def> ECX<kill>
shrl %cl, %edi
movl -4...
2010 Aug 27
0
[LLVMdev] What does this error mean: psuedo instructions should be removed before code emission?
...n:
>> * PEI::insertPrologEpilogCode: === >> before emitEpilogue
>> - insn: PUSH64r %RBP<kill>, %RSP<imp-def>, %RSP<imp-use>
>> - insn: PROLOG_LABEL <MCSym=.Ltmp2>
>> - insn: %RBP<def> = MOV64rr %RSP
>> - insn: PROLOG_LABEL <MCSym=.Ltmp3>
>> - insn: %RDI<def> = MOV64ri64i32 60910096
>> - insn: %RAX<def> = MOV64ri <ga:@_ZN010HelloWorld4mainEPN13ContainerSVecE>
>> - insn: TCRETURNri64 %RAX<kill>, 0, %RDI<kill>, %RAX<imp-def,dead>, %RDI<imp-def,dead>, %RSP<imp-use>,...