search for: lshl

Displaying 13 results from an estimated 13 matches for "lshl".

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2014 Feb 25
2
[LLVMdev] ScheduleDAGInstrs/R600 test potential issue with implicit defs
...ion, but it solves the issue). I am attaching the corresponding patch. However, while upgrading our code to LLVM 3.4, I found that the test/CodeGen/R600/store.ll test fails for -mcpu=redwood due to this change. The difference is in the following line in @store_i8: With my patch applied I get: LSHL * T0.W, PV.W, literal.x, 3(4.203895e-45), 0(0.000000e+00) LSHL * T1.X, T1.W, PV.W, LSHL * T1.W, literal.x, T0.W, 255(3.573311e-43), 0(0.000000e+00) versus the orginal output of LLVM 3.4: LSHL * T0.W, PV.W, l...
2014 Feb 25
4
[LLVMdev] ScheduleDAGInstrs/R600 test potential issue with implicit defs
Hi Tom, Thanks a lot for your explanations, now it makes a lot more sense ;) I had a slightly closer look at the R600 packetizer, and the issue is that the third LSHL instruction has both an implicit use and *afterwards* an implicit def of T1_XYZW. The latter def causes the current ScheduleDAGInstrs implementation to ignore the implicit use, thus the ScheduleDAG only contains an anti-dependency from the second to the third LSHL and the packetizer can bundle...
2013 May 07
1
[LLVMdev] Why is there no ashl/lshl?
Hi Tim, >> There is a distinction between logical/arithmetic shift right, but why >> not for shift left? > > The arithmetic right shift has the nice property that it preserves the > fact that x >> 1 == x/2 for negative signed numbers (unlike the > logical shift). except when x is -1. That said, this is correct: the reason for distinct signed and unsigned right
2013 May 07
0
[LLVMdev] Why is there no ashl/lshl?
Hi, > There is a distinction between logical/arithmetic shift right, but why > not for shift left? The arithmetic right shift has the nice property that it preserves the fact that x >> 1 == x/2 for negative signed numbers (unlike the logical shift). Either because of this or because of other uses I can't think of right now almost all modern CPUs implement it in hardware, and
2013 May 07
1
[LLVMdev] Why is there no ashl/lshl?
> From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] > On Behalf Of Tim Northover > In contrast, it's not quite clear what an arithmetic left-shift would > be. If you want to keep x << 1 == x*2 then the logical one already > does this. Only if the left-most (shiftcount + 1) bits are all-0 or all-1. I've used machines that distinguished
2013 May 07
3
[LLVMdev] Why is there no ashl/lshl?
There is a distinction between logical/arithmetic shift right, but why not for shift left? I'm also a bit confused by one example in the reference manual: <result> = lshr i8 -2, 1 ; yields {i8}:result = 0x7FFFFFFF Is this an error in the manual? The result is supposed to be an i8 yet a i32 is shown. -- edA-qa mort-ora-y -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
2008 Oct 30
0
[LLVMdev] Using patterns inside patterns
I am not sure what you are looking to do. Please provide a mark up example. Evan On Oct 28, 2008, at 11:00 AM, Villmow, Micah wrote: > Is there currently a way to use a pattern inside of another pattern? > > Micah Villmow > Systems Engineer > Advanced Technology & Performance > Advanced Micro Devices Inc. > 4555 Great America Pkwy, > Santa Clara, CA. 95054 > P:
2008 Oct 30
1
[LLVMdev] Using patterns inside patterns
...the second parameter, so I have this pattern: // integer subtraction // a - b ==> a + (-b) def ISUB : Pat<(sub GPRI32:$src0, GPRI32:$src1), (IADD GPRI32:$src0, (INEGATE GPRI32:$src1))>; I am attemping to do 64 bit integer shifts and using the following pattern: def LSHL : Pat<(shl GPRI64:$src0, GPRI32:$src1), (LCREATE (ISHL (LLO GPRI64:$src0), GPRI32:$src1), (IOR (ISHL (LHI GPRI64:$src0), GPRI32:$src1), (IOR (USHR (LLO GPRI64:$src0), (IADD (LOADCONST_i32 32), (INEGATE GPRI32:$src1))), (USHR (LLO GPRI64:$src0), (IADD GPRI32:$src1, (LOADCONST_...
2008 Oct 28
4
[LLVMdev] Using patterns inside patterns
Is there currently a way to use a pattern inside of another pattern? Micah Villmow Systems Engineer Advanced Technology & Performance Advanced Micro Devices Inc. 4555 Great America Pkwy, Santa Clara, CA. 95054 P: 408-572-6219 F: 408-572-6596 -------------- next part -------------- An HTML attachment was scrubbed... URL:
2012 Jul 31
0
[LLVMdev] rotate
On Jul 31, 2012, at 3:04 AM, Andy Gibbs <andyg1001 at hotmail.co.uk> wrote: > On Monday, July 30, 2012 12:16 AM, Cameron McInally wrote: >> Hey Andy, >> >> I proposed a similar patch to LLVM (left circular shift) around 10/2011. >> Parts of my patch did make it into trunk about a year after, but others >> did not. >> >> At that time, my
2001 Jun 21
0
factors in model.frame.default
...u4muMjumLzv27YM3i979oFJpc/bVgLZU9kRKFsHyjCyHTa/XGeUxrJz hD5Ct/gCGsdhewSNK3vR2/Xz0+do8iP8P6B5nIyXwTHTB8QmLVDrY7Niu47e r+sMl2v3iw9ACemQLpFJrmjHmgoweZtM1C4rSWof61iJksHOH/PLlND+PFCb 0h2SxXVNAS8RqZDlULEuAJ0N0hrBSK6DPwhgbQxMFnY+4Hnd99r9jJAL/NGL DeJVTC0ZCgNlYSl7NzlY3UmfhUGFi7Xjeq3da9I3o67eHJwlTpYT2TK7fpvG LSHl/Y7PwxO4UnUkuHoBsRSswVcNVb1OU1/emFsdMymrQhaffwd4q/jwjMca RVq86WAR1bLjFohmQa+5nO6qVPhnoBowpgE+Evwh4tJGTEseDKtjFhYjyutC +LyMBM9QNkzZ9qtX/Fk+RAcmlU0T4Js5jl02PvY0Jt7/43ks/tfff5Y+GCxl zbpOZgfZfDO7bQubZEyAWJAOppGAx5m3lpMEfI/zwyPgErQu+f434j/BOgbM VcFjZsjDBRbs5lsK4PDSpeEJMH/IuDGFSYdlNDcUWqcJ09OSzxl+wgOL37jZ...
2012 Jul 31
4
[LLVMdev] rotate
On Monday, July 30, 2012 12:16 AM, Cameron McInally wrote: > Hey Andy, > > I proposed a similar patch to LLVM (left circular shift) around 10/2011. > Parts of my patch did make it into trunk about a year after, but others > did not. > > At that time, my solution was to add a binary operator to the IRBuilder, > since LCS fits in nicely with the other shift operators. But,
2006 Nov 27
2
Shares problem
I am trying to produce 2 kinds of shares: [homes] the typical home directory share. And an all users (even guest) writable share. On the home directory share, I am able to create files through my windows XP, but I unable to create new directories. The all available share I can't even browse. Help please. Shlomi PS: I attached my smb.conf