search for: ls_ucode_img_load_gr

Hi Christophe, s/fix some error handling in 'ls_ucode_img_load_gr/plug memory leak in ls_ucode_img_load_gr() error path/ On 8 May 2017 at 08:46, Christophe JAILLET <christophe.jaillet at wanadoo.fr> wrote: > The last goto looks spurious because it releases less resources than the > previous one. > Add a new label in order to free the memory alloca...

...s/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode_gr.c b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode_gr.c index d1cf02d22db1..1b83e1395c34 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode_gr.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode_gr.c @@ -116,6 +116,7 @@ ls_ucode_img_load_gr(const struct nvkm_subdev *subdev, struct ls_ucode_img *img, ret = nvkm_firmware_get(subdev->device, f, &sig); if (ret) goto free_data; + img->sig = kmemdup(sig->data, sig->size, GFP_KERNEL); if (!img->sig) { ret = -ENOMEM; @@ -127,10 +128,12 @@ ls_ucode_img_load_gr(...

...s/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode_gr.c b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode_gr.c index d1cf02d22db1..1b0c793c0192 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode_gr.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode_gr.c @@ -116,6 +116,7 @@ ls_ucode_img_load_gr(const struct nvkm_subdev *subdev, struct ls_ucode_img *img, ret = nvkm_firmware_get(subdev->device, f, &sig); if (ret) goto free_data; + img->sig = kmemdup(sig->data, sig->size, GFP_KERNEL); if (!img->sig) { ret = -ENOMEM; @@ -126,8 +127,9 @@ ls_ucode_img_load_gr(co...

...m/nouveau/nvkm/subdev/secboot/ls_ucode_gr.c index 1c32cb0f16f9..40a6df77bb8a 100644 --- a/drm/nouveau/nvkm/subdev/secboot/ls_ucode_gr.c +++ b/drm/nouveau/nvkm/subdev/secboot/ls_ucode_gr.c @@ -91,10 +91,9 @@ ls_ucode_img_build(const struct firmware *bl, const struct firmware *code, */ static int ls_ucode_img_load_gr(const struct nvkm_subdev *subdev, struct ls_ucode_img *img, - const char *falcon_name, const u32 falcon_id) + const char *falcon_name) { - const struct firmware *bl, *code, *data; - struct lsf_ucode_desc *lsf_desc; + const struct firmware *bl, *code, *data, *sig; char f[64]; int re...

...code_data; u32 ucode_size; diff --git a/drm/nouveau/nvkm/subdev/secboot/ls_ucode_gr.c b/drm/nouveau/nvkm/subdev/secboot/ls_ucode_gr.c index 09f5f1f1a50d..1c32cb0f16f9 100644 --- a/drm/nouveau/nvkm/subdev/secboot/ls_ucode_gr.c +++ b/drm/nouveau/nvkm/subdev/secboot/ls_ucode_gr.c @@ -98,8 +98,6 @@ ls_ucode_img_load_gr(const struct nvkm_subdev *subdev, struct ls_ucode_img *img, char f[64]; int ret; - img->ucode_header = NULL; - snprintf(f, sizeof(f), "gr/%s_bl", falcon_name); ret = nvkm_firmware_get(subdev->device, f, &bl); if (ret) -- 2.10.0

Sending things in a smaller chunks since it makes their reviewing easier. This part part 2/3 of the secboot refactoring/PMU command support patch series. Part 1 was the new falcon library which should be merged soon now. This series is mainly a refactoring/sanitization of the existing secure boot code. It does not add new features (part 3 will). Secure boot handling is now separated by NVIDIA

This is a rework of the secure boot code that moves the building of the blob into its own set of source files (and own hooks), making the code more flexible and (hopefully) easier to understand as well. This rework is needed to support more signed firmware for existing and new chips. Since the firmwares in question are not available yet I cannot send the code to manage then, but hopefully the

This is a rework of the secure boot code that moves the building of the blob into its own set of source files (and own hooks), making the code more flexible and (hopefully) easier to understand as well. This rework is needed to support more signed firmware for existing and new chips. Since the firmwares in question are not available yet I cannot send the code to manage then, but hopefully the

GP10B is the chip used in Tegra X2 SoCs. This patchset adds support for its base engines after reworking secboot a bit to accomodate its calling convention better. This patchset has been tested rendering simple off-screen buffers using Mesa and yielded the expected result. Alexandre Courbot (15): secboot: allow to boot multiple falcons secboot: pass instance to LS firmware loaders secboot:

This revision includes initial signed PMU firmware support for GM20B (Tegra X1). This PMU code will also be used as a basis for dGPU signed PMU firmware support. With the PMU code, the refactoring of secure boot should also make more sense. ACR (secure boot) support is now separated by the driver version it originates from. This separation allows to run any version of the ACR on any chip,