search for: lowervaarg

Hi everyone, I'm interested in variadic functions and how llvm handles them. I discovered that the Clang frontend is doing a great job at lowering the va_arg (precisely __builtin_va_arg) function into target dependent code. I have also seen the va_arg function that exist at IR level. I found some information about va_arg (IR one) that currently does not support all platform. But since 2009,

...g instruction working on X86-64 Linux. This requires implementing VAARG lowering for X86-64. I am fine with implementing it, but I am unsure of what approach I should take. The straightforward option is to add the DAG nodes required to perform the operation during lowering. (in X86TargetLowering::LowerVAARG()). However, the resulting code will be relatively long to accommodate the complexity of what va_arg must do. It would be easier to operate on a higher level, for example, by implementing va_arg in LLVM assembly. Is it possible (or preferable) to implement an intrinsic (va_arg) using target-specif...

...ase (2.2) 2. I copied the file SimplifyLibCalls.cpp from lib/Transforms/Scalar to lib/Transforms/IPO. I think the position of this file was updated but the MSVC project wasn't. 3. I put a "return SDOperand();" on X86ISelLowering.cpp, on function "SDOperand X86TargetLowering::LowerVAARG(SDOperand Op, SelectionDAG &DAG)" after "abort()", to make compiler happy to compile it. 4. I needed to give "Build Solution" more times, because there are some incorrect dependencies between projects and some of them expect results from the future builded ones. Af...

Not that I sympathize with the OP's manners but... Bill Wendling <isanbard at gmail.com> writes: > On May 10, 2008, at 7:55 PM, kr512 wrote: > >> See how gcc is invoked to generate the final executable >> file. This means LLVM is an incomplete backend, >> unfortunately. >> > That's only a convenience. GCC generates assembly code too and calls

I'm trying to fix PR12201, and would like some advice. Here's what is happening: On PPC32 VAARG is custom lowered (in PPCTargetLowering::LowerVAARG) and can create two ISD::SELECT nodes that use a ISD::SETCC node with a ISD::SETLT parameter. On PPC, ISD::SELECT is expanded, and here both of these SELECT nodes are expanded into ISD::SELECT_CC nodes with a ISD::SETLT node used by both. These SELECT_CC nodes are not directly instruction selected...

...o > lib/Transforms/IPO. I think the position of this file was updated > but the > MSVC project wasn't. Please update the project file and send a patch for it. > 3. I put a "return SDOperand();" on X86ISelLowering.cpp, on function > "SDOperand X86TargetLowering::LowerVAARG(SDOperand Op, SelectionDAG > &DAG)" > after "abort()", to make compiler happy to compile it. This went into mainline, Tanya, can we pull this patch into 2.3? http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20080512/062268.html > 4. I needed to give "...

...describe this problem. The solution is simple. (use floor(x + 0.5)) Patch below. This solves the MS compiler issue too (same thing). Other possibility is to use configure to determine the presence of round(). 3) /home/ggreif/llvm/lib/Target/PowerPC/PPCISelLowering.cpp: In function `llvm::SDOperand LowerVAARG(llvm::SDOperand, llvm::SelectionDAG&, int, int, unsigned int, unsigned int, const llvm::PPCSubtarget&)': /home/ggreif/llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1104: warning: no return statement in function returning non-void 4) /home/ggreif/llvm/lib/CodeGen/SimpleRegisterCoalescing....

...VT::Other, Custom); > + setOperationAction(ISD::ADJUST_TRAMPOLINE, MVT::Other, Custom); > > // VASTART needs to be custom lowered to use the VarArgsFrameIndex > setOperationAction(ISD::VASTART , MVT::Other, Custom); > @@ -1369,8 +1371,13 @@ SDValue PPCTargetLowering::LowerVAARG(SDValue Op, SelectionDAG &DAG, > return DAG.getLoad(VT, dl, InChain, Result, MachinePointerInfo(), false, false, 0); > } > > -SDValue PPCTargetLowering::LowerTRAMPOLINE(SDValue Op, > - SelectionDAG &DAG) const { > +SDValue PPCT...

Hi! Attached set of patches splits llvm.init.trampoline into an "init" phase and an "adjust" phase, as discussed on the "Go on dragonegg" thread. Thanks! -- Sanjoy Das http://playingwithpointers.com -------------- next part -------------- A non-text attachment was scrubbed... Name: 0001-Split-intrinsics-and-DAG-nodes.patch Type: text/x-diff Size: 8808 bytes Desc:

...hasHardQuad); + case ISD::EH_SJLJ_SETJMP: return LowerEH_SJLJ_SETJMP(Op, DAG, *this); + case ISD::EH_SJLJ_LONGJMP: return LowerEH_SJLJ_LONGJMP(Op, DAG, *this); case ISD::VASTART: return LowerVASTART(Op, DAG, *this); case ISD::VAARG: return LowerVAARG(Op, DAG); case ISD::DYNAMIC_STACKALLOC: return LowerDYNAMIC_STACKALLOC(Op, DAG, *************** *** 3052,3057 **** --- 3073,3085 ---- case SP::SELECT_CC_DFP_FCC: case SP::SELECT_CC_QFP_FCC: return expandSelectCC(MI, BB, SP::FBCOND); + case SP::EH_SJLJ_SETJMP32ri: + case SP::EH...