search for: lowerbuild_vector

Hi All, First of all, I am not native English speaker. While reading BUILD_VECTOR related code, for example, PPCTargetLowering::LowerBUILD_VECTOR, I see "splat" here and there. Could someone explain what it is (does splat mean the same thing across the whole code base)? Besides, from my English dictionary, I don't know why we call such thing as "splat"... :p Regards, chenwj -- Wei-Ren Chen (陳韋任) Homepage: https://p...

...n llvm::MVT::getVectorElementType (this=0xbfffdda4) at ValueTypes.h:317 #6 0x002aed06 in BuildSplatI (Val=0, SplatSize=8, VT={{V = 24, SimpleTy = llvm::MVT::v4i32, LLVMTy = 0x18}}, DAG=@0x16088a0, dl={Idx = 4294967295}) at PPCISelLowering.cpp:311\ 5 #7 0x002afae4 in llvm::PPCTargetLowering::LowerBUILD_VECTOR (this=0x1803d58, Op={Node = 0x157a530, ResNo = 0}, DAG=@0x16088a0) at PPCISelLowering.cpp:3200 #8 0x002bb54f in llvm::PPCTargetLowering::LowerOperation (this=0x1803d58, Op={Node = 0x157a530, ResNo = 0}, DAG=@0x16088a0) at PPCISelLowering.cpp:3766 #9 0x0051bed6 in (anonymous namespace)::...

...ype (this=0xbfffdda4) > at ValueTypes.h:317 > #6 0x002aed06 in BuildSplatI (Val=0, SplatSize=8, VT={{V = 24, > SimpleTy = llvm::MVT::v4i32, LLVMTy = 0x18}}, DAG=@0x16088a0, > dl={Idx = 4294967295}) at PPCISelLowering.cpp:311\ > 5 > #7 0x002afae4 in llvm::PPCTargetLowering::LowerBUILD_VECTOR > (this=0x1803d58, Op={Node = 0x157a530, ResNo = 0}, DAG=@0x16088a0) > at PPCISelLowering.cpp:3200 > #8 0x002bb54f in llvm::PPCTargetLowering::LowerOperation > (this=0x1803d58, Op={Node = 0x157a530, ResNo = 0}, DAG=@0x16088a0) > at PPCISelLowering.cpp:3766 > #9 0x0051bed...

On Wed, Mar 16, 2016 at 6:38 PM, Mehdi Amini <mehdi.amini at apple.com> wrote: > > On Mar 16, 2016, at 5:38 PM, Rail Shafigulin <rail at esenciatech.com> wrote: > > On Wed, Mar 16, 2016 at 11:48 AM, Mehdi Amini <mehdi.amini at apple.com> > wrote: > >> Hi Rail, >> >> Two hints to begin with: >> >> 1) Makes sure you example is

...e(llvm::ConstantFPSDNode*, short int&)’: /Volumes/mrs5/net/llvm/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp: 148: warning: dereferencing type-punned pointer will break strict- aliasing rules /Volumes/mrs5/net/llvm/llvm/lib/Target/CellSPU/SPUISelLowering.cpp: In function ‘llvm::SDOperand LowerBUILD_VECTOR(llvm::SDOperand, llvm::SelectionDAG&)’: /Volumes/mrs5/net/llvm/llvm/lib/Target/CellSPU/SPUISelLowering.cpp: 1690: warning: ‘val’ may be used uninitialized in this function /Volumes/mrs5/net/llvm/llvm/lib/Target/CellSPU/SPUISelLowering.cpp: In function ‘llvm::SDOperand LowerLOAD(llvm::SDOpe...

...a4) at >> ValueTypes.h:317 >> #6 0x002aed06 in BuildSplatI (Val=0, SplatSize=8, VT={{V = 24, SimpleTy = >> llvm::MVT::v4i32, LLVMTy = 0x18}}, DAG=@0x16088a0, dl={Idx = 4294967295}) at >> PPCISelLowering.cpp:311\ >> 5 >> #7 0x002afae4 in llvm::PPCTargetLowering::LowerBUILD_VECTOR >> (this=0x1803d58, Op={Node = 0x157a530, ResNo = 0}, DAG=@0x16088a0) at >> PPCISelLowering.cpp:3200 >> #8 0x002bb54f in llvm::PPCTargetLowering::LowerOperation (this=0x1803d58, >> Op={Node = 0x157a530, ResNo = 0}, DAG=@0x16088a0) at >> PPCISelLowering.cpp:3766 >&g...

...ementType (this=0xbfffdda4) at > ValueTypes.h:317 > #6 0x002aed06 in BuildSplatI (Val=0, SplatSize=8, VT={{V = 24, SimpleTy = > llvm::MVT::v4i32, LLVMTy = 0x18}}, DAG=@0x16088a0, dl={Idx = 4294967295}) at > PPCISelLowering.cpp:311\ > 5 > #7 0x002afae4 in llvm::PPCTargetLowering::LowerBUILD_VECTOR > (this=0x1803d58, Op={Node = 0x157a530, ResNo = 0}, DAG=@0x16088a0) at > PPCISelLowering.cpp:3200 > #8 0x002bb54f in llvm::PPCTargetLowering::LowerOperation (this=0x1803d58, > Op={Node = 0x157a530, ResNo = 0}, DAG=@0x16088a0) at > PPCISelLowering.cpp:3766 > #9 0x0051bed6 in (an...

...>> at ValueTypes.h:317 >> #6 0x002aed06 in BuildSplatI (Val=0, SplatSize=8, VT={{V = 24, >> SimpleTy = llvm::MVT::v4i32, LLVMTy = 0x18}}, DAG=@0x16088a0, >> dl={Idx = 4294967295}) at PPCISelLowering.cpp:311\ >> 5 >> #7 0x002afae4 in llvm::PPCTargetLowering::LowerBUILD_VECTOR >> (this=0x1803d58, Op={Node = 0x157a530, ResNo = 0}, DAG=@0x16088a0) >> at PPCISelLowering.cpp:3200 >> #8 0x002bb54f in llvm::PPCTargetLowering::LowerOperation >> (this=0x1803d58, Op={Node = 0x157a530, ResNo = 0}, DAG=@0x16088a0) >> at PPCISelLowering.cpp:376...

...short int&)’: > /Volumes/mrs5/net/llvm/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp: > 148: warning: dereferencing type-punned pointer will break strict- > aliasing rules > > > /Volumes/mrs5/net/llvm/llvm/lib/Target/CellSPU/SPUISelLowering.cpp: In > function ‘llvm::SDOperand LowerBUILD_VECTOR(llvm::SDOperand, > llvm::SelectionDAG&)’: > /Volumes/mrs5/net/llvm/llvm/lib/Target/CellSPU/SPUISelLowering.cpp: > 1690: warning: ‘val’ may be used uninitialized in this function > /Volumes/mrs5/net/llvm/llvm/lib/Target/CellSPU/SPUISelLowering.cpp: In > function ‘llvm::SDOperand L...

Duncan: I'm still stymied how this whole thread ended up about shuffle vector nodes, when the original problem was my build vector patch. I'm still working on backing the build vector patch out (it isn't clean with all of the intervening commits and I have pressing management tasks which command my attention.) -scooter On Tue, Feb 24, 2009 at 12:28 AM, Duncan Sands <baldrick at

...Craig Topper < >>>>>>>>>>>>>>>>> craig.topper at gmail.com> wrote: >>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>> It looks like X86TargetLowering::LowerBUILD_VECTOR is >>>>>>>>>>>>>>>>>> not creating a broadcast node for your wider vector type. >>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>> ~Craig >>>...

> 3. Introduce a new ShuffleVectorSDNode that only has two SDValue > operands (the two input vectors), but that also contains an array of > ints in the node (not as operands). ... > The important part of #3 is that we really want an array of ints > (using -1 for undef) for the shuffle mask, not "operands". This > eliminates the nastiness we have now were we

...gt;>>>>>>>>>>>>>>>>> craig.topper at gmail.com> wrote: >>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>> It looks like X86TargetLowering::LowerBUILD_VECTOR is >>>>>>>>>>>>>>>>>>>> not creating a broadcast node for your wider vector type. >>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>...

...gt;>>>>>>>>> craig.topper at gmail.com> wrote: >>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>> It looks like X86TargetLowering::LowerBUILD_VECTOR >>>>>>>>>>>>>>>>>>>>>>>> is not creating a broadcast node for your wider vector type. >>>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>...

Hello. I'm having problems at instruction selection with my back end with the following basic-block due to a vector add with immediate constant vector (obtained by vectorizing a simple C program doing vector sum map): vector.ph: ; preds = %vector.memcheck50 %.splatinsert = insertelement <8 x i64> undef, i64 %i.07.unr, i32 0

On Wed, May 20, 2009 at 4:55 PM, Dan Gohman <gohman at apple.com> wrote: > Can you explain why you chose the approach of using a new pass? > I pictured removing LegalizeDAG's type legalization code would > mostly consist of finding all the places that use TLI.getTypeAction > and just deleting code for handling its Expand and Promote. Are you > anticipating something more

On May 20, 2009, at 1:34 PM, Eli Friedman wrote: > On Wed, May 20, 2009 at 1:19 PM, Eli Friedman > <eli.friedman at gmail.com> wrote: > >> Per subject, this patch adding an additional pass to handle vector >> >> operations; the idea is that this allows removing the code from >> >> LegalizeDAG that handles illegal types, which should be a significant

...;SDValue,SDValue> FP_TO_SINTHelper(SDValue Op, - SelectionDAG &DAG); + std::pair<SDValue,SDValue> FP_TO_INTHelper(SDValue Op, SelectionDAG &DAG, + bool isSigned); SDValue LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG); SDValue LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG); @@ -586,11 +586,16 @@ SDValue LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG); SDValue LowerExternalSymbol(SDValue Op, SelectionDAG &DAG); SDValue LowerShift(SDValue...