search for: loops

Displaying 20 results from an estimated 26576 matches for "loops".

Did you mean: loop
2020 Mar 20
5
CFG manipulation and !llvm.loop metadata
...searches for it in all loop latches (and only successfully finds it if all latches reference the same metadata) However, transforms which modify the CFG, for example using SplitCriticalEdge(), generally don't make any attempt to preserve this property. Some transforms dealing specifically with loops use getLoopID and setLoopID to preserve and reset the metadata after transformations, but function transforms such as GVN and Jump Threading can modify control flow without any attempt to update the location. For example: preheader: ... loop.body: ; preds = %prehea...
2013 Jan 31
0
[LLVMdev] [PATCH] parallel loop metadata
Dear all, Here's an updated version of the parallel loop metadata patch. It includes documentation for the new metadata types with a semantics description. -- Pekka -------------- next part -------------- A non-text attachment was scrubbed... Name: parallel-loop-metadata.patch Type: text/x-patch Size: 12972 bytes Desc: not available URL:
2013 Jan 30
3
[LLVMdev] [PATCH] parallel loop metadata
On Wed, Jan 30, 2013 at 12:35 PM, Pekka Jääskeläinen <pekka.jaaskelainen at tut.fi> wrote: > Thank you all for comments, > > > On 01/30/2013 11:22 AM, David Tweed wrote: >> >> In a personal capacity I'm quite interested in the issues of producing >> from a >> high-level language some LLVM IR which is labelled with vectorization info >> (including
2019 May 28
6
Making loop guards part of canonical loop structure
...it_edge: ; preds = %for.inc br label %for.cond.cleanup for.cond.cleanup: ; preds = %for.cond.for.cond.cleanup_crit_edge, %entry br label %for.end for.end: ; preds = %for.cond.cleanup ret void However, for loops that can be proven to execute at least once, there is no guard. This creates complications for several loop optimizations because they need to handle both guarded loops and non-guarded loops. For example, the current loop fusion pass needs to check whether two loops are control flow equivalent bef...
2015 Jul 15
5
[LLVMdev] Improving loop vectorizer support for loops with a volatile iteration variable
Hi all, I would like to propose an improvement of the “almost dead” block elimination in Transforms/Local.cpp so that it will preserve the canonical loop form for loops with a volatile iteration variable. *** Problem statement Nested loops in LCALS Subset B (https://codesign.llnl.gov/LCALS.php) are not vectorized with LLVM -O3 because the LLVM loop vectorizer fails the test whether the loop latch and exiting block of a loop is the same. The loops are vectorizable...
2018 Aug 09
3
Legacy Loop Pass Manager question
...se. For example for this code snippet PM.add(createIndVarSimplifyPass()); // Canonicalize indvars MPM.add(createLoopIdiomPass()); // Recognize idioms like memset. addExtensionsToPM(EP_LateLoopOptimizations, MPM); MPM.add(createLoopDeletionPass()); // Delete dead loops .. if (!DisableUnrollLoops) MPM.add(createSimpleLoopUnrollPass(OptLevel)); // Unroll small loops I see -debug-pass=Structure output: Scalar Evolution Analysis Loop Pass Manager Induction Variable Simplification Recognize loop idioms Delete dea...
2011 Jan 24
2
crazy loop error.
...runs from 1 to length of a. At every number of a, it enters the while-loop and a hello is saved into list ldata. If the next number in the vector a is a different number from previous then the while-loop is exited and saved hello is printed. If the next number in vector a is same as before then it loops inside the while-loop and several hellos are printed together. Then run-time error is Error in while (z1 == a[n]) { : missing value where TRUE/FALSE needed Thats because an NA creeps in somewhere. The problem can be seen far before that. The full output from the run is below. A lot of stuff was...
2016 Jun 23
3
[Proposal][RFC] Cache aware Loop Cost Analysis
...n its loop nest. Reference groups are necessary during cost computation only. > > You could probably describe how you envision this analysis would be used > with something like Loop Fusion. > For Loop Interchange, the cost calculated for each loop can provide a desired ordering of the loops. Loop interchange can start interchanging the loops to match the desired order iff interchange legality check passes. Eg: For matrix multiplication case, for (i = 0 to 5000) for (j = 0 to 5000) for (k = 0 to 5000) C[i,j] = C[i,j] + A[i,k]* B[k,j] Here,...
2019 May 30
2
Making loop guards part of canonical loop structure
On Hexagon, unguarded loops cannot be converted to hardware loops. If the loop's latch branch alone handles the iteration count, including the possibility of 0, then the loop cannot be converted to a hardware loop, because hardware loops must iterate at least once. If the entire loop is guarded against zero iteration co...
2011 Apr 30
3
[LLVMdev] LoopInfo are not able to identify some natural loops?
In C code, if a loop is not a natural loop, that means its loop body should at least have one label, right? In that case, some BB out of the loop can jump to the loop body, so the loop has more than on entry. Does LoopInfo guarantee to identify all natural loops? This property is very important for my pass. regards, Bo On Fri, Apr 29, 2011 at 11:50 PM, Cameron Zwarich <zwarich at apple.com> wrote: > A natural loop is one whose header dominates all of the nodes in the loop. > There is probably some block outside of the loop jumping to a block...
2014 May 09
3
[LLVMdev] parallel loop metadata question
...anch instruction, also all of the memory accessing instructions in the loop body need to be marked with the llvm.mem.parallel_loop_access metadata. If there is at least one memory accessing instruction not marked with the metadata, the loop must be considered a sequential loop. This causes parallel loops to be converted to sequential loops due to optimization passes that are unaware of the parallel semantics and that insert new memory instructions to the loop body. --- To be: --- The llvm.mem.parallel_loop_access metadata attaches to instructions and denotes that no loop carried memory dependence...
2015 Jan 12
8
[LLVMdev] RFC: Loop distribution/Partial vectorization
Hi, We'd like to propose new Loop Distribution pass. The main motivation is to allow partial vectorization of loops. One such example is the main loop of 456.hmmer in SpecINT_2006. The current version of the patch improves hmmer by 24% on ARM64 and 18% on X86. The goal of the pass is to distribute a loop that can't be vectorized because of memory dependence cycles. The pass splits the part with cycles in...
2014 May 23
2
[LLVMdev] parallel loop metadata question
...en wrote: > Hi, > > This looks good to me except that the first sentence > could already include "that refer to the same loop" or > similar. > > I could imagine that e.g. loop invariant code motion, > if applied to a parallel loop could hoist code out of > inner loops to outer (parallel) loops. Then the outer > loop contains parallel_loop_access instructions referring to > the inner loop, making the outer loop non-trivially parallel. > > But these are probably rare cases as, at least in pocl, basic > optimizations have already been executed before...
2015 Jan 17
3
[LLVMdev] loop multiversioning
...ccp -globalopt -deadargelim -domtree -instcombine -simplifycfg -basiccg -prune-eh -inline-cost -inline -functionattrs -argpromotion -sroa -domtree -early-cse -lazy-value-info -jump-threading -correlated-propagation -simplifycfg -domtree -instcombine -tailcallelim -simplifycfg -reassociate -domtree -loops -loop-simplify -lcssa -loop-rotate -licm -loop-unswitch -instcombine -scalar-evolution -loop-simplify -lcssa -indvars -loop-idiom -loop-deletion -function_tti -loop-unroll -memdep -mldst-motion -domtree -memdep -gvn -memdep -memcpyopt -sccp -domtree -instcombine -lazy-value-info -jump-threading -co...
2016 Jan 19
3
CFG SCCs vs Loops and loop breaking transformations
I ran across an interesting case and wanted to share it. I'm not proposing any particular changes, but the experience seemed interesting to discuss. First, a bit of background. An LLVM Loop models a specific type of cycle in the CFG. Not all cycles are Loops. Many of our optimization transforms are phrased over loops, which means that a non-loop cycle tends to be less well optimized. I had some initial IR that had a very complex, oddly written loop. After running this through my pass order, I discovered that there was no longer a Loop representin...
2013 Feb 07
4
[LLVMdev] Parallel Loop Metadata
...ttached to each memory >> instruction!). I think that the motivation for the first metadata is clear - >> it says that the loop is data-parallel. I can also see us adding additional >> metadata such as llvm.loop.unrollcnt to allow the users to control the unroll >> count of loops using pragmas. That's fine. Pekka, can you think of >> transformations that may need invalidate or take this metadata into >> consideration ? > > Any pass that introduces new non-parallel memory instructions to the loop, > because they think the loop is sequential and it...
2015 Oct 12
2
question about llvm partial unrolling/runtime unrolling
Hi, I am trying to do loop unrolling with loops that don't have constant loop counter. It is highly appreciated if anyone can help me on this. What I want to do is to turn loop (n) { <loop body> } into loop (n/4) { <loop body> <loop body> <loop body> <loop body...
2015 Mar 12
3
[LLVMdev] Question about shouldMergeGEPs in InstructionCombining
I think it would make sense for (1) and (2). I am not sure if (3) is feasible in instcombine. (I am not too familiar with LoopInfo) For the Octasic's Opus platform, I modified shouldMergeGEPs in our fork to: if (GEP.hasAllZeroIndices() && !Src.hasAllZeroIndices() && !Src.hasOneUse()) return false; return Src.hasAllConstantIndices(); // was return false;
2010 May 10
3
[LLVMdev] Separate loop condition and loop body
On Mon, May 10, 2010 at 12:32:06PM -0700, Trevor Harmon wrote: > On May 10, 2010, at 11:35 AM, Benoit Boissinot wrote: > > >To me it looks like any basic block from the loop body with a > >successor not in the loop body is a BB "building the condition" (an > >"exit" block). > > I assume you mean "any basic block from the loop header".
2015 Mar 12
2
[LLVMdev] Question about shouldMergeGEPs in InstructionCombining
...h is likely the right solution for InstCombine (which has the job of canonicalizing the IR). We should, however, pull these apart somewhere, and probably in some way that is address-mode aware. I'd recommend trying to split non-free (via the addressing-mode) loop-invariant parts of GEPs out of loops in CodeGenPrep. -Hal ----- Original Message ----- > From: "Mark Heffernan" <meheff at google.com> > To: "Francois Pichet" <pichet2000 at gmail.com> > Cc: "Hal Finkel" <hfinkel at anl.gov>, "LLVM Developers Mailing List" <llvmd...