Displaying 9 results from an estimated 9 matches for "loopdataprefetch".
2017 Aug 08
2
[ScalarEvolution][SCEV] no-wrap flags dependent on order of getSCEV() calls
Hi all,
I'm looking into resolving a FIXME in the LoopDataPrefetch (and
FalkorMarkStridedAccesses) pass by marking both of these passes as
preserving the ScalarEvolution analysis. Unfortunately, when this
change is made, LSR will generate different code. One of the root
causes seems to be that SCEV will return different nsw/nuw flags for the
same Value, dep...
2016 Mar 04
4
Regarding Usage of opt
Hi,
I am new to llvm, and recently am playing with opt. I want to use opt to
apply one optimization pass to a .bc file. However, I encounter some
problems which I failed to find the answers on the internet. Any
suggestions are highly appreciated.
Question 1:
For example, I issued the following command
$: opt-trunk -si-lower-control-flow t.c_00.bc -o t.c_01.bc
Then I got the following
2017 Aug 08
2
[ScalarEvolution][SCEV] no-wrap flags dependent on order of getSCEV() calls
On 8/8/2017 1:37 PM, Friedman, Eli wrote:
> On 8/8/2017 10:22 AM, Geoff Berry via llvm-dev wrote:
>> Hi all,
>>
>> I'm looking into resolving a FIXME in the LoopDataPrefetch (and FalkorMarkStridedAccesses) pass by marking both of these passes as preserving the ScalarEvolution analysis. Unfortunately, when this change is made, LSR will generate different code. One of the root causes seems to be that SCEV will return different nsw/nuw flags for the same Value, dependin...
2017 Aug 14
2
[ScalarEvolution][SCEV] no-wrap flags dependent on order of getSCEV() calls
> On Aug 14, 2017, at 7:35 AM, Geoff Berry <gberry at codeaurora.org> wrote:
>
> Hi Sanjoy,
>
> [adding Adam since I believe he added the original FIXME to preserve SCEV
> in LoopDataPrefetch]
For record, that wasn’t me. It was there from the beginning when Hal added the PPC-specific pass.
Adam
>
> On 8/14/2017 1:36 AM, Sanjoy Das wrote:
>> Hi Geoff,
>> On Wed, Aug 9, 2017 at 8:58 AM, Geoff Berry <gberry at codeaurora.org> wrote:
>>> On 8/8/2017 8:3...
2016 May 18
1
Optimization remarks for non-temporal stores
...sponding optimization.
Note that NT stores is just one example here. This is a general problem. We will probably have the same problem when we try to report data-layout transformation opportunities, etc.
I see three ways to solve this:
1. Report it from an existing, similar pass. In this case LoopDataPrefetch may be a candidate. It would still be somewhat strange to ask the user to pass -Rpass-analysis=loop-data-perfetch to see NT store opportunities but may be not too bad.
2. Report it as part of the corresponding analysis. This would probably be LoopAccessAnalysis in this case. We would have to ma...
2017 Aug 14
2
[ScalarEvolution][SCEV] no-wrap flags dependent on order of getSCEV() calls
Hi Geoff,
On Wed, Aug 9, 2017 at 8:58 AM, Geoff Berry <gberry at codeaurora.org> wrote:
> On 8/8/2017 8:38 PM, Sanjoy Das wrote:
>>
>> Hi,
>>
>> On Tue, Aug 8, 2017 at 12:58 PM, Friedman, Eli <efriedma at codeaurora.org>
>> wrote:
>>>
>>> Oh, I see... yes, we do stupid things involving mutating NoWrap flags
>>> after
2018 Nov 01
3
RFC: System (cache, etc.) model for LLVM
Am Do., 1. Nov. 2018 um 15:21 Uhr schrieb David Greene <dag at cray.com>>
> > thank you for sharing the system hierarchy model. IMHO it makes a lot
> > of sense, although I don't know which of today's passes would make use
> > of it. Here are my remarks.
>
> LoopDataPrefetch would use it via the existing TTI interfaces, but I
> think that's about it for now. It's a bit of a chicken-and-egg, in that
> passes won't use it if it's not there and there's no push to get it in
> because few things use it. :)
What kind of passes is using it in t...
2018 Nov 02
2
RFC: System (cache, etc.) model for LLVM
Hey,
I've been reading back the thread and there's a lot of ideas flying
around, I may have missed more than I should, but here's my view on
it.
First, I think this is a good idea.
Mapping caches is certainly interesting to general architectures, but
particularly important to massive operations like matrix multiply and
stencils can pull a lot of data into cache and sometimes thrash
2018 Nov 01
2
RFC: System (cache, etc.) model for LLVM
Hi,
thank you for sharing the system hierarchy model. IMHO it makes a lot
of sense, although I don't know which of today's passes would make use
of it. Here are my remarks.
I am wondering how one could model the following features using this
model, or whether they should be part of a performance model at all:
* ARM's big.LITTLE
* NUMA hierarchies (are the NUMA domains