search for: loop_test

...ure that this will prove embarrassingly obvious. :-) Cheers, Eric ; ModuleID = 'regex-opt.bc' implementation ; Functions: bool %matches(ubyte* %begin, ubyte* %end) { entry: %scan_end = getelementptr ubyte* %end, int -1 ; <ubyte*> [#uses=1] br label %loop_test regex6: ; preds = %loop_test %c8 = load ubyte* %iter ; <ubyte> [#uses=1] %matches9 = seteq ubyte %c8, 97 ; <bool> [#uses=1] br bool %matches9, label %ret_true, label %regex2 regex2: ; preds = %regex6 %c = load ubyte*...

...; > Cheers, > Eric > > ; ModuleID = 'regex-opt.bc' > > implementation ; Functions: > > bool %matches(ubyte* %begin, ubyte* %end) { > entry: > %scan_end = getelementptr ubyte* %end, int -1 ; <ubyte*> > [#uses=1] > br label %loop_test > > regex6: ; preds = %loop_test > %c8 = load ubyte* %iter ; <ubyte> [#uses=1] > %matches9 = seteq ubyte %c8, 97 ; <bool> [#uses=1] > br bool %matches9, label %ret_true, label %regex2 > > regex2: ; preds = %regex6...

...-gcse" instead of "-load-vn -licm" That works! Thank you. The bytecodes look really good--not only are the loads eliminated, but the tests are actually reduced to a switch statement using '-anders-aa -load-vn -gcse -simplifycfg -instcombine': regex6: ; preds = %loop_test %c8 = load ubyte* %iter ; <ubyte> [#uses=1] switch ubyte %c8, label %loop_step [ ubyte 97, label %ret_true ubyte 98, label %ret_true ] Unfortunately, this generates really weird code on the LLVM 1.6 PowerPC backend: LB...

...;; %while.body ;; =>This Inner Loop Header: Depth=1 sw R2 , R0, 0 add R0 , 4 cmpne R1 , R0 bcc24 _BB2_2 nop _BB2_3: ;; %while.end b r15 nop --- For reference, the .ll file: --- ; ModuleID = 'loop_test.c' target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:32-f64:32:32-v64:32:32-v128:32:32-n32-s0:32:32-a0:0:32-S32" target triple = "arch--" define void @Init1(i32* nocapture %data) nounwind { entry: br label %for.body for.body:...