Displaying 8 results from an estimated 8 matches for "loop_minimal".
2013 Oct 31
0
[LLVMdev] loop vectorizer misses opportunity, exploit
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For example on an x86 processor with SSE (128 bit SIMD vectors) the loop body could be vectorized into 2 SIMD reads, 1 SIMD add and 1 SIMD store.
With current trunk I tried the following on the above example:
clang++ -emit-llvm -S loop_minimal.cc -std=c++11
opt -O3 -vectorize-slp -S loop_minimal.ll
opt -O3 -loop-vectorize -S loop_minimal.ll
opt -O3 -bb-vectorize -S loop_minimal.ll
All optimization passes miss the opportunity. It seems the SCEV AA pass doesn't understand modulo arithmetic.
How can the SCEV AA pass be extended to han...
2013 Oct 31
2
[LLVMdev] loop vectorizer misses opportunity, exploit
On 31 October 2013 08:01, Frank Winter <fwinter at jlab.org> wrote:
> With current trunk I tried the following on the above example:
>
> clang++ -emit-llvm -S loop_minimal.cc -std=c++11
> opt -O3 -vectorize-slp -S loop_minimal.ll
> opt -O3 -loop-vectorize -S loop_minimal.ll
> opt -O3 -bb-vectorize -S loop_minimal.ll
>
> All optimization passes miss the opportunity. It seems the SCEV AA pass doesn't understand modulo arithmetic.
>
>
Hi Frank,...
2013 Oct 31
5
[LLVMdev] loop vectorizer
On 30 October 2013 18:40, Frank Winter <fwinter at jlab.org> wrote:
> const std::uint64_t ir0 = (i+0)%4; // not working
>
I thought this would be the case when I saw the original expression. Maybe
we need to teach module arithmetic to SCEV?
--renato
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2013 Oct 31
3
[LLVMdev] loop vectorizer misses opportunity, exploit
...7 18 19
> i 12: 24 25 26 27
>
> For example on an x86 processor with SSE (128 bit SIMD vectors) the loop body could be vectorized into 2 SIMD reads, 1 SIMD add and 1 SIMD store.
>
> With current trunk I tried the following on the above example:
>
> clang++ -emit-llvm -S loop_minimal.cc -std=c++11
> opt -O3 -vectorize-slp -S loop_minimal.ll
> opt -O3 -loop-vectorize -S loop_minimal.ll
> opt -O3 -bb-vectorize -S loop_minimal.ll
>
> All optimization passes miss the opportunity. It seems the SCEV AA pass doesn't understand modulo arithmetic.
>
> How can...
2013 Oct 31
3
[LLVMdev] loop vectorizer misses opportunity, exploit
...19
> i 12: 24 25 26 27
>
> For example on an x86 processor with SSE (128 bit SIMD vectors) the
> loop body could be vectorized into 2 SIMD reads, 1 SIMD add and 1
> SIMD store.
>
> With current trunk I tried the following on the above example:
>
> clang++ -emit-llvm -S loop_minimal.cc -std=c++11
> opt -O3 -vectorize-slp -S loop_minimal.ll
> opt -O3 -loop-vectorize -S loop_minimal.ll
> opt -O3 -bb-vectorize -S loop_minimal.ll
>
> All optimization passes miss the opportunity. It seems the SCEV AA
> pass doesn't understand modulo arithmetic.
>
> How...
2013 Oct 31
0
[LLVMdev] loop vectorizer misses opportunity, exploit
...24 25 26 27
>>
>> For example on an x86 processor with SSE (128 bit SIMD vectors) the loop body could be vectorized into 2 SIMD reads, 1 SIMD add and 1 SIMD store.
>>
>> With current trunk I tried the following on the above example:
>>
>> clang++ -emit-llvm -S loop_minimal.cc -std=c++11
>> opt -O3 -vectorize-slp -S loop_minimal.ll
>> opt -O3 -loop-vectorize -S loop_minimal.ll
>> opt -O3 -bb-vectorize -S loop_minimal.ll
>>
>> All optimization passes miss the opportunity. It seems the SCEV AA pass doesn't understand modulo arithmetic....
2013 Oct 31
0
[LLVMdev] loop vectorizer misses opportunity, exploit
...;>
>> For example on an x86 processor with SSE (128 bit SIMD vectors) the
>> loop body could be vectorized into 2 SIMD reads, 1 SIMD add and 1
>> SIMD store.
>>
>> With current trunk I tried the following on the above example:
>>
>> clang++ -emit-llvm -S loop_minimal.cc -std=c++11
>> opt -O3 -vectorize-slp -S loop_minimal.ll
>> opt -O3 -loop-vectorize -S loop_minimal.ll
>> opt -O3 -bb-vectorize -S loop_minimal.ll
>>
>> All optimization passes miss the opportunity. It seems the SCEV AA
>> pass doesn't understand modulo ari...
2013 Oct 31
0
[LLVMdev] loop vectorizer misses opportunity, exploit
----- Original Message -----
>
> On 31 October 2013 08:01, Frank Winter < fwinter at jlab.org > wrote:
>
>
>
>
>
>
> With current trunk I tried the following on the above example:
>
> clang++ -emit-llvm -S loop_minimal.cc -std=c++11
> opt -O3 -vectorize-slp -S loop_minimal.ll
> opt -O3 -loop-vectorize -S loop_minimal.ll
> opt -O3 -bb-vectorize -S loop_minimal.ll
>
> All optimization passes miss the opportunity. It seems the SCEV AA
> pass doesn't understand modulo arithmetic.
>
>
&g...