Displaying 10 results from an estimated 10 matches for "loop_end".
2013 Nov 10
2
[LLVMdev] loop vectorizer: JIT + AVX segfaults
...in my application. I isolated the barfing function and it
still segfaults in the minimal setup:
The IR attached implements the following simple function:
void bar(int start, int end, int ignore , bool add , bool addme , float*
out, float* in)
{
int loop_start = add ? start+add : start;
int loop_end = add ? end+add : end;
loop_start /= 8;
loop_end /= 8;
for ( int i = loop_start ; i < loop_end ; ++i )
for ( int q = 0 ; q < 8 ; ++q )
out[ i * 8 + q ] = in[ i * 8 + q ];
}
The main.cc program implements the following:
Set loop vectorizer min trip count to 4
Create Modu...
2011 Aug 02
1
Compile Speex for Blackfin in VisualDsp
...47f000\acc22e8547f001.s":483 Syntax Error in :
LOOP_BEGIN vq_loopR2=;
syntax error is at or near text '='.
Attempting error recovery by ignoring text until the ';'
[Error ea5004] "C:\Users\coder\AppData\Local\Temp\acc22e8547f000\acc22e8547f001.s":485 Syntax Error in :
LOOP_END vq_loopR2=;
syntax error is at or near text '='.
Attempting error recovery by ignoring text until the ';'
[Error ea5004] "C:\Users\coder\AppData\Local\Temp\acc22e8547f000\acc22e8547f001.s":650 Syntax Error in :
LOOP entries_loopR4= LC0;
syntax error is at or near text '...
2013 Nov 11
0
[LLVMdev] loop vectorizer: JIT + AVX segfaults
...g function and it
> still segfaults in the minimal setup:
>
> The IR attached implements the following simple function:
>
> void bar(int start, int end, int ignore , bool add , bool addme , float*
> out, float* in)
> {
> int loop_start = add ? start+add : start;
> int loop_end = add ? end+add : end;
> loop_start /= 8;
> loop_end /= 8;
> for ( int i = loop_start ; i < loop_end ; ++i )
> for ( int q = 0 ; q < 8 ; ++q )
> out[ i * 8 + q ] = in[ i * 8 + q ];
> }
>
> The main.cc program implements the following:
>
> Set loop...
2009 Apr 24
2
[PATCH] Blackfin: cleanup astat/cc/hardware loop asm clobbers
...ot;, "A0", "A1", "memory", "ASTAT" BFIN_HWLOOP0_REGS BFIN_HWLOOP1_REGS
);
shape_cb += subvect_size;
resp += subvect_size;
@@ -107,6 +106,6 @@ static inline void target_update(spx_word16_t *t, spx_word16_t g, spx_word16_t *
"LOOP_END tupdate%=;\n\t"
:
: "a" (t), "a" (r), "d" (g), "a" (len)
- : "R0", "R1", "R2", "A1", "I0", "I1", "L0", "L1"
+ : "R0", "R1", "R2", &q...
2013 Nov 11
2
[LLVMdev] loop vectorizer: JIT + AVX segfaults
...till segfaults in the minimal setup:
>
> The IR attached implements the following simple function:
>
> void bar(int start, int end, int ignore , bool add , bool addme ,
> float* out, float* in)
> {
> int loop_start = add ? start+add : start;
> int loop_end = add ? end+add : end;
> loop_start /= 8;
> loop_end /= 8;
> for ( int i = loop_start ; i < loop_end ; ++i )
> for ( int q = 0 ; q < 8 ; ++q )
> out[ i * 8 + q ] = in[ i * 8 + q ];
> }
>
> The main.cc program implements the f...
2010 Mar 25
0
Blackfin inline assembly for fixed math
..."R1 = %2;\n\t"
//"R0 = R0 + R1;\n\t"
"R0 <<= 1;\n\t"
"DIVS (R0, R1);\n\t"
"LOOP divide%= LC0 = P0;\n\t"
"LOOP_BEGIN divide%=;\n\t"
"DIVQ (R0, R1);\n\t"
"LOOP_END divide%=;\n\t"
"R0 = R0.L;\n\t"
"%0 = R0;\n\t"
: "=m" (res)
: "m" (a), "m" (bb)
: "P0", "R0", "R1", "cc");
return res;
}
#undef DIV32_16
static inline celt_int16 DIV32_16(ce...
2013 Aug 22
2
New routine: FLAC__lpc_compute_autocorrelation_asm_ia32_sse_lag_16
...xmm0, xmm0, 0 ; xmm0 == data[sample],data[sample],data[sample],data[sample] = data[0],data[0],data[0],data[0]
+ xorps xmm2, xmm2 ; xmm2 = 0,0,0,0
+ xorps xmm3, xmm3 ; xmm3 = 0,0,0,0
+ xorps xmm4, xmm4 ; xmm4 = 0,0,0,0
+ movaps xmm7, xmm0
+ mulps xmm7, xmm1
+ addps xmm5, xmm7
+ dec edx
+ jz .loop_end
+ ALIGN 16
+.loop_start:
+ ; start by reading the next sample
+ movss xmm0, [eax] ; xmm0 = 0,0,0,data[sample]
+ add eax, 4
+ shufps xmm0, xmm0, 0 ; xmm0 = data[sample],data[sample],data[sample],data[sample]
+
+ ; shift xmm4:xmm3:xmm2:xmm1 left by one float
+ shufps xmm1, xmm1, 93h
+ shufps xmm...
2006 Jan 18
2
Errors in speex lib with Blackfin
...^//here is the same problem
"R0.L = W[I0] || R1.L = W[I1++];\n\t"
"R1 = (A1 = R1.L*%2.L) (IS);\n\t"
"R1 >>>= 11;\n\t"
"R0.L = R0.L - R1.L;\n\t"
"W[I0++] = R0.L;\n\t"
"LOOP_END tupdate%=;\n\t"
^//and here
:
: "a" (t), "a" (r), "d" (g), "a" (len)
: "R0", "R1", "A1", "I0", "I1", "L0", "L1"
);
So, I removed the sig...
2006 Jan 18
0
Errors in speex lib with Blackfin
...t; "R0.L = W[I0] || R1.L = W[I1++];\n\t"
> "R1 = (A1 = R1.L*%2.L) (IS);\n\t"
> "R1 >>>= 11;\n\t"
> "R0.L = R0.L - R1.L;\n\t"
> "W[I0++] = R0.L;\n\t"
> "LOOP_END tupdate%=;\n\t"
> ^//and here
> :
> : "a" (t), "a" (r), "d" (g), "a" (len)
> : "R0", "R1", "A1", "I0", "I1", "L0", "L1"
> );...
2014 Mar 03
6
[Bug 2207] New: Potential NULL deference, found using coverity
...c/amesh/142/src/crypto/openssh/authfile.c:237:
cond_true: Condition "!memcmp(cp, "-----END OPENSSH PRIVATE
KEY-----\n", m2len)", taking true branch
path:/c/amesh/142/src/crypto/openssh/authfile.c:239:
break: Breaking from loop
path:/c/amesh/142/src/crypto/openssh/authfile.c:242:
loop_end: Reached end of loop
path:/c/amesh/142/src/crypto/openssh/authfile.c:243:
cond_false: Condition "!len", taking false branch
path:/c/amesh/142/src/crypto/openssh/authfile.c:246:
if_end: End of if statement
path:/c/amesh/142/src/crypto/openssh/authfile.c:248:
cond_false: Condition "(cp...