search for: log2p

...+++ b/drivers/gpu/drm/nouveau/nv04_crtc.c @@ -143,10 +143,10 @@ static void nv_crtc_calc_state_ext(struct drm_crtc *crtc, struct drm_display_mod state->pllsel |= nv_crtc->index ? PLLSEL_VPLL2_MASK : PLLSEL_VPLL1_MASK; if (pv->NM2) - NV_TRACE(dev, "vpll: n1 %d n2 %d m1 %d m2 %d log2p %d\n", + NV_DEBUG_KMS(dev, "vpll: n1 %d n2 %d m1 %d m2 %d log2p %d\n", pv->N1, pv->N2, pv->M1, pv->M2, pv->log2P); else - NV_TRACE(dev, "vpll: n %d m %d log2p %d\n", + NV_DEBUG_KMS(dev, "vpll: n %d m %d log2p %d\n", pv->N1, pv->...

...(struct nouveau_clock *clock, struct nvbios_pll *info, + int clk, struct nouveau_pll_vals *pv) +{ + int ret, N, M, P; + + ret = nva3_pll_calc(clock, info, clk, &N, NULL, &M, &P); + + if (ret > 0) { + pv->refclk = info->refclk; + pv->N1 = N; + pv->M1 = M; + pv->log2P = P; + } + return ret; +} + + static int nva3_clock_ctor(struct nouveau_object *parent, struct nouveau_object *engine, struct nouveau_oclass *oclass, void *data, u32 size, @@ -80,6 +98,7 @@ nva3_clock_ctor(struct nouveau_object *parent, struct nouveau_object *engine, return ret; priv-&g...

...EDID for VGA-1 [ 3.956043] [drm] nouveau 0000:05:00.0: Load detected on output B [ 3.956154] [drm] nouveau 0000:05:00.0: allocated 720x576 fb: 0x9000, bo f6afc600 [ 3.957190] [drm] nouveau 0000:05:00.0: Setting dpms mode 3 on CRTC 0 [ 3.957200] [drm] nouveau 0000:05:00.0: vpll: n 20 m 3 log2p 1 [ 3.957203] [drm] TV-10: set mode 720x576 26 [ 3.957438] [drm] nouveau 0000:05:00.0: Setting dpms mode 0 on CRTC 0 [ 3.967428] [drm] nouveau 0000:05:00.0: Setting dpms mode 0 on TV encoder (output 3) [ 3.967439] [drm] nouveau 0000:05:00.0: Output TV-1 is running on CRTC 0 using output...

...+ if (!nouveau_calc_pll_mnp(dev, &pll_lim, dot_clock, pv)) return; state->pllsel &= PLLSEL_VPLL1_MASK | PLLSEL_VPLL2_MASK | PLLSEL_TV_MASK; @@ -152,13 +149,6 @@ static void nv_crtc_calc_state_ext(struct drm_crtc *crtc, struct drm_display_mod NV_TRACE(dev, "vpll: n %d m %d log2p %d\n", pv->N1, pv->M1, pv->log2P); - nouveau_calc_arb(dev, vclk, fb->bits_per_pixel, &arb_burst, &arb_fifo_lwm); - - regp->CRTC[NV_CIO_CRE_FF_INDEX] = arb_burst; - regp->CRTC[NV_CIO_CRE_FFLWM__INDEX] = arb_fifo_lwm & 0xff; - if (nv_arch(dev) >= NV_30) -...

...[ DRM] Setting dpms mode 3 on CRTC 1 [ 5.445055] nouveau [ DRM] CTRC mode on CRTC 1: [ 5.445065] [drm:drm_mode_debug_printmodeline], Modeline 51:"1024x768" 60 108000 1024 1072 1176 1328 768 771 775 798 0x40 0x6 [ 5.445097] nouveau [ DRM] vpll: n1 181 n2 1 m1 12 m2 1 log2p 1 [ 5.445105] [drm:drm_crtc_helper_set_mode], [ENCODER:14:LVDS-14] set [MODE:49:1024x768] [ 5.445109] nouveau [ DRM] Output mode on CRTC 1: [ 5.445118] [drm:drm_mode_debug_printmodeline], Modeline 37:"1400x1050" 0 108000 1400 1448 1560 1688 1050 1051 1054 1066 0x48 0xa [...

> On Tue, Apr 01, 2014 at 02:53:02PM -0400, Ilia Mirkin wrote: >I believe that ch7006 is the only external encoder that's supposed to >work, so you're in luck. It sounds like it passes the nv04_tv_identify >stage of nv04_tv_create -- perhaps it fails later? Although based on >the prints, it's even doing dpms stuff (but it hits _detect a second >time... odd). Try

It seems it was only locking up in the context of nouveau_hw_save_vga_fonts, when it actually did something (because the console wasn't already in graphics mode). Signed-off-by: Francisco Jerez <currojerez at riseup.net> --- drivers/gpu/drm/nouveau/nouveau_hw.c | 9 +++++++++ 1 files changed, 9 insertions(+), 0 deletions(-) diff --git a/drivers/gpu/drm/nouveau/nouveau_hw.c

This patch series adds TV-out modesetting support to the KMS implementation. I've tried to test it on all the hardware I've got at hand (that is nv11, nv17, nv34, nv35, nv40, nv4b) with every possible output combination; I believe it has reached a mergeable state, however it depends on some commits from drm-next that haven't got into Linus' tree yet, if you agree to merge this