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...ctor to not be aligned on natural (16 byte) bounds @misaligner = internal global i32 zeroinitializer @the_vector = internal global <6 x i32> zeroinitializer define i32 @align_test() { store <6 x i32> <i32 1, i32 2, i32 3, i32 4, i32 5, i32 6>, <6 x i32>* @the_vector %loadedval = load i32* getelementptr inbounds (<6 x i32>* @the_vector, i64 0, i64 4 ); ret i32 %loadedval } -------------- next part -------------- A non-text attachment was scrubbed... Name: spu-nolcomm.patch Type: text/x-patch Size: 845 bytes Desc: not available URL: <http://lists.llvm.org/p...

On Wed, 2015-08-05 at 10:02 -0400, Ramkumar Ramachandra wrote: > > - at 5 = internal global [10 x i8] c"\22\D0\12\F4!\00\15\F9\EC\E1" > - at 6 = internal global [10 x i8] c"\D0\19\FB+\FD\F8#\03\E2\11" > + at 5 = internal global [10 x i8] c"\22Ð\12ô!\00\15ùìá" > + at 6 = internal global [10 x i8] c"Ð\19û+ýø#\03â\11" > > The diff

Hello, I'm writing a backend for an architecture that only has LOAD Instructions that first copy the old value of the target register in another register and after that load the provided value into the register. Example of an addition: load a, reg1; // -> copies old value of reg1 in reg2 and loads value from a into reg1 load b, reg1; // -> copies old value of reg1 in reg2 and loads