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2012 Aug 15
0
[LLVMdev] More Back-End Porting Troubles
...cific instruction within the TargetLowering? [Villmow, Micah] Have you tried using a tablegen pattern here? I find it is easier for simple conversions like this than using C++ code. For example our backend does this with: def uitoli64rr:Pat < (i64 (zext GPRI32:$src)), (LCREATEi64rr GPRI32:$src, (LOADCONSTi32 0)) >; Where LCREATE is a machine instruction that does similar to ISD::BUILD_PAIR from two i32's and outputs a i64. > > Any hints are highly welcome! > > Ciao, Fabian > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiu...
2012 Aug 16
2
[LLVMdev] More Back-End Porting Troubles
...ving '[]'-patterns). > [Villmow, Micah] Have you tried using a tablegen pattern here? I find it is easier for simple conversions like this than using C++ code. > For example our backend does this with: > def uitoli64rr:Pat < (i64 (zext GPRI32:$src)), (LCREATEi64rr GPRI32:$src, (LOADCONSTi32 0)) >; > Where LCREATE is a machine instruction that does similar to ISD::BUILD_PAIR from two i32's and outputs a i64. > I already tried to use a pattern, but for some reason I messed it up. Giving it another try now, I finally succeeded :-) And yes, it is much easier than doing it in...
2012 Aug 15
5
[LLVMdev] More Back-End Porting Troubles
Hi LLVM-Folks, as mentioned in an earlier post (http://lists.cs.uiuc.edu/pipermail/llvmdev/2012-July/051677.html) I am currently working on a Back-End for the TriCore processor. Currently, I am struggling as LLVM could not select zext and load, for instance, so some of the testcases in test/CodeGen/Generic are not successfully compiled by my back-end. Furthermore, I am completely puzzled by the
2012 Aug 16
0
[LLVMdev] More Back-End Porting Troubles
...> > [Villmow, Micah] Have you tried using a tablegen pattern here? I find > it is easier for simple conversions like this than using C++ code. > > For example our backend does this with: > > def uitoli64rr:Pat < (i64 (zext GPRI32:$src)), (LCREATEi64rr > > GPRI32:$src, (LOADCONSTi32 0)) >; Where LCREATE is a machine > instruction that does similar to ISD::BUILD_PAIR from two i32's and > outputs a i64. > > > > I already tried to use a pattern, but for some reason I messed it up. > Giving it another try now, I finally succeeded :-) And yes, it is muc...