Displaying 20 results from an estimated 143 matches for "load_tls".
2007 Apr 18
0
[RFC/PATCH PV_OPS X86_64 07/17] paravirt_ops - descriptor changes.
...t desc_ptr *dtr)
+{
+ asm volatile("lidt %w0"::"m" (*dtr));
+}
+
+#ifdef CONFIG_PARAVIRT
+#include <asm/paravirt.h>
+#else
+#define load_idt native_load_idt
+#define load_gdt native_load_gdt
+#define load_TR_desc native_load_tr_desc
+#define set_ldt native_set_ldt
+#define load_TLS native_load_TLS
+#endif /* CONFIG_PARAVIRT */
+
+#define clear_LDT() set_ldt(NULL,0)
+
#define LDT_entry_a(info) \
((((info)->base_addr & 0x0000ffff) << 16) | ((info)->limit & 0x0ffff))
@@ -149,7 +174,7 @@ static inline void set_seg_base(unsigned
# error update this code....
2007 Apr 18
0
[RFC/PATCH PV_OPS X86_64 07/17] paravirt_ops - descriptor changes.
...t desc_ptr *dtr)
+{
+ asm volatile("lidt %w0"::"m" (*dtr));
+}
+
+#ifdef CONFIG_PARAVIRT
+#include <asm/paravirt.h>
+#else
+#define load_idt native_load_idt
+#define load_gdt native_load_gdt
+#define load_TR_desc native_load_tr_desc
+#define set_ldt native_set_ldt
+#define load_TLS native_load_TLS
+#endif /* CONFIG_PARAVIRT */
+
+#define clear_LDT() set_ldt(NULL,0)
+
#define LDT_entry_a(info) \
((((info)->base_addr & 0x0000ffff) << 16) | ((info)->limit & 0x0ffff))
@@ -149,7 +174,7 @@ static inline void set_seg_base(unsigned
# error update this code....
2007 Jul 09
1
[PATCH RFC] first cut at splitting up paravirt_ops
...lock = native_sched_clock,
- .get_cpu_khz = native_calculate_cpu_khz,
- .load_tr_desc = native_load_tr_desc,
- .set_ldt = native_set_ldt,
- .load_gdt = native_load_gdt,
- .load_idt = native_load_idt,
- .store_gdt = native_store_gdt,
- .store_idt = native_store_idt,
- .store_tr = native_store_tr,
- .load_tls = native_load_tls,
- .write_ldt_entry = write_dt_entry,
- .write_gdt_entry = write_dt_entry,
- .write_idt_entry = write_dt_entry,
- .load_esp0 = native_load_esp0,
-
- .set_iopl_mask = native_set_iopl_mask,
- .io_delay = native_io_delay,
-
+static struct paravirt_ops paravirt_ops = {
+ .pv_info = {...
2007 Jul 09
1
[PATCH RFC] first cut at splitting up paravirt_ops
...lock = native_sched_clock,
- .get_cpu_khz = native_calculate_cpu_khz,
- .load_tr_desc = native_load_tr_desc,
- .set_ldt = native_set_ldt,
- .load_gdt = native_load_gdt,
- .load_idt = native_load_idt,
- .store_gdt = native_store_gdt,
- .store_idt = native_store_idt,
- .store_tr = native_store_tr,
- .load_tls = native_load_tls,
- .write_ldt_entry = write_dt_entry,
- .write_gdt_entry = write_dt_entry,
- .write_idt_entry = write_dt_entry,
- .load_esp0 = native_load_esp0,
-
- .set_iopl_mask = native_set_iopl_mask,
- .io_delay = native_io_delay,
-
+static struct paravirt_ops paravirt_ops = {
+ .pv_info = {...
2007 Apr 18
2
[PATCH 2/5] Paravirt cpu batching.patch
...e_flush_tlb,
.flush_tlb_kernel = native_flush_tlb_global,
diff -r 320f0d4d2280 arch/i386/kernel/process.c
--- a/arch/i386/kernel/process.c Tue Dec 12 13:50:50 2006 -0800
+++ b/arch/i386/kernel/process.c Tue Dec 12 13:50:53 2006 -0800
@@ -665,6 +665,37 @@ struct task_struct fastcall * __switch_t
load_TLS(next, cpu);
/*
+ * Restore IOPL if needed.
+ */
+ if (unlikely(prev->iopl != next->iopl))
+ set_iopl_mask(next->iopl);
+
+ /*
+ * Now maybe handle debug registers and/or IO bitmaps
+ */
+ if (unlikely((task_thread_info(next_p)->flags & _TIF_WORK_CTXSW)
+ || test_tsk_thr...
2007 Apr 18
2
[PATCH 2/5] Paravirt cpu batching.patch
...e_flush_tlb,
.flush_tlb_kernel = native_flush_tlb_global,
diff -r 320f0d4d2280 arch/i386/kernel/process.c
--- a/arch/i386/kernel/process.c Tue Dec 12 13:50:50 2006 -0800
+++ b/arch/i386/kernel/process.c Tue Dec 12 13:50:53 2006 -0800
@@ -665,6 +665,37 @@ struct task_struct fastcall * __switch_t
load_TLS(next, cpu);
/*
+ * Restore IOPL if needed.
+ */
+ if (unlikely(prev->iopl != next->iopl))
+ set_iopl_mask(next->iopl);
+
+ /*
+ * Now maybe handle debug registers and/or IO bitmaps
+ */
+ if (unlikely((task_thread_info(next_p)->flags & _TIF_WORK_CTXSW)
+ || test_tsk_thr...
2020 Aug 07
0
[PATCH v3 4/7] x86/paravirt: remove 32-bit support from PARAVIRT_XXL
...86/include/asm/paravirt.h
@@ -160,8 +160,6 @@ static inline void wbinvd(void)
PVOP_VCALL0(cpu.wbinvd);
}
-#define get_kernel_rpl() (pv_info.kernel_rpl)
-
static inline u64 paravirt_read_msr(unsigned msr)
{
return PVOP_CALL1(u64, cpu.read_msr, msr);
@@ -277,12 +275,10 @@ static inline void load_TLS(struct thread_struct *t, unsigned cpu)
PVOP_VCALL2(cpu.load_tls, t, cpu);
}
-#ifdef CONFIG_X86_64
static inline void load_gs_index(unsigned int gs)
{
PVOP_VCALL1(cpu.load_gs_index, gs);
}
-#endif
static inline void write_ldt_entry(struct desc_struct *dt, int entry,
const void *...
2020 Aug 15
0
[PATCH v4 1/6] x86/paravirt: remove 32-bit support from PARAVIRT_XXL
...86/include/asm/paravirt.h
@@ -160,8 +160,6 @@ static inline void wbinvd(void)
PVOP_VCALL0(cpu.wbinvd);
}
-#define get_kernel_rpl() (pv_info.kernel_rpl)
-
static inline u64 paravirt_read_msr(unsigned msr)
{
return PVOP_CALL1(u64, cpu.read_msr, msr);
@@ -277,12 +275,10 @@ static inline void load_TLS(struct thread_struct *t, unsigned cpu)
PVOP_VCALL2(cpu.load_tls, t, cpu);
}
-#ifdef CONFIG_X86_64
static inline void load_gs_index(unsigned int gs)
{
PVOP_VCALL1(cpu.load_gs_index, gs);
}
-#endif
static inline void write_ldt_entry(struct desc_struct *dt, int entry,
const void *...
2007 Apr 18
0
[PATCH 11/12] subarch-desc
...& 0x0ffff))
@@ -140,17 +115,6 @@
(info)->seg_not_present == 1 && \
(info)->useable == 0 )
-static inline void write_ldt_entry(struct desc_struct *ldt, int entry, __u32 entry_a, __u32 entry_b)
-{
- ldt[entry].a = entry_a;
- ldt[entry].b = entry_b;
-}
-
-static inline void load_TLS(struct thread_struct *t, unsigned int cpu)
-{
- memcpy(&get_cpu_gdt_table(cpu)[GDT_ENTRY_TLS_MIN], t->tls_array, TLS_SIZE);
-}
-
static inline void clear_LDT(void)
{
int cpu = get_cpu();
Index: linux-2.6.13/include/asm-i386/mach-default/mach_desc.h
=======================================...
2007 Apr 18
0
[PATCH 11/12] subarch-desc
...& 0x0ffff))
@@ -140,17 +115,6 @@
(info)->seg_not_present == 1 && \
(info)->useable == 0 )
-static inline void write_ldt_entry(struct desc_struct *ldt, int entry, __u32 entry_a, __u32 entry_b)
-{
- ldt[entry].a = entry_a;
- ldt[entry].b = entry_b;
-}
-
-static inline void load_TLS(struct thread_struct *t, unsigned int cpu)
-{
- memcpy(&get_cpu_gdt_table(cpu)[GDT_ENTRY_TLS_MIN], t->tls_array, TLS_SIZE);
-}
-
static inline void clear_LDT(void)
{
int cpu = get_cpu();
Index: linux-2.6.13/include/asm-i386/mach-default/mach_desc.h
=======================================...
2007 Apr 18
3
Proposed interface change
I would like to propose an interface change to the following
paravirt-ops calls:
void (fastcall *write_ldt_entry)(void *dt, int entrynum, u64 entry);
void (fastcall *write_gdt_entry)(void *dt, int entrynum, u64 entry);
void (fastcall *write_idt_entry)(void *dt, int entrynum, u64 entry);
Can we consolidate the dt and entrynum parameters and just pass
dt+entrynum*8? I
2007 Dec 06
51
[PATCH 0/19] desc_struct integration
Hi,
this is a series of patches that unify the struct desc_struct and friends
across x86_64 and i386. As usual, it provides paravirt capabilities as a
side-effect for x86_64.
I consider the main goal, namely, of unifying the desc_struct, an ongoing
effort, being this the beginning. A lot of old code has to be touched to
accomplish that.
I don't consider this patch ready for inclusion.
2007 Dec 06
51
[PATCH 0/19] desc_struct integration
Hi,
this is a series of patches that unify the struct desc_struct and friends
across x86_64 and i386. As usual, it provides paravirt capabilities as a
side-effect for x86_64.
I consider the main goal, namely, of unifying the desc_struct, an ongoing
effort, being this the beginning. A lot of old code has to be touched to
accomplish that.
I don't consider this patch ready for inclusion.
2017 Sep 04
0
[PATCH] x86/paravirt: remove no longer used paravirt functions
...7 +128,6 @@ static inline int desc_empty(const void *ptr)
#define load_ldt(ldt) asm volatile("lldt %0"::"m" (ldt))
#define store_gdt(dtr) native_store_gdt(dtr)
-#define store_idt(dtr) native_store_idt(dtr)
#define store_tr(tr) (tr = native_store_tr())
#define load_TLS(t, cpu) native_load_tls(t, cpu)
@@ -248,7 +247,7 @@ static inline void native_store_gdt(struct desc_ptr *dtr)
asm volatile("sgdt %0":"=m" (*dtr));
}
-static inline void native_store_idt(struct desc_ptr *dtr)
+static inline void store_idt(struct desc_ptr *dtr)
{
asm vol...
2017 Sep 04
0
[PATCH] x86/paravirt: remove no longer used paravirt functions
...7 +128,6 @@ static inline int desc_empty(const void *ptr)
#define load_ldt(ldt) asm volatile("lldt %0"::"m" (ldt))
#define store_gdt(dtr) native_store_gdt(dtr)
-#define store_idt(dtr) native_store_idt(dtr)
#define store_tr(tr) (tr = native_store_tr())
#define load_TLS(t, cpu) native_load_tls(t, cpu)
@@ -248,7 +247,7 @@ static inline void native_store_gdt(struct desc_ptr *dtr)
asm volatile("sgdt %0":"=m" (*dtr));
}
-static inline void native_store_idt(struct desc_ptr *dtr)
+static inline void store_idt(struct desc_ptr *dtr)
{
asm vol...
2014 May 06
0
poor write performance or locking issues with ocfs2
...f81356ef4>] kernel_thread_helper+0x4/0x10
[<ffffffff8105f60b>] kthread+0x0/0x7e
[<ffffffff81356ef0>] kernel_thread_helper+0x0/0x10
[<ffffffffffffffff>] 0xffffffffffffffff
[<ffffffffa015f007>] jbd2_journal_commit_transaction+0x1a6/0x10bf [jbd2]
[<ffffffff8100d02f>] load_TLS+0x7/0xa
[<ffffffff8100d69e>] __switch_to+0x133/0x258
[<ffffffff81039ac2>] finish_task_switch+0x88/0xb9
[<ffffffff81071011>] arch_local_irq_save+0x11/0x17
[<ffffffff8105fcd3>] autoremove_wake_function+0x0/0x2a
[<ffffffffa0163156>] kjournald2+0xc0/0x20a [jbd2]
[<fffff...
2007 Oct 09
2
[PATCH RFC REPOST 1/2] paravirt: refactor struct paravirt_ops into smaller pv_*_ops
...lock = native_sched_clock,
- .get_cpu_khz = native_calculate_cpu_khz,
- .load_tr_desc = native_load_tr_desc,
- .set_ldt = native_set_ldt,
- .load_gdt = native_load_gdt,
- .load_idt = native_load_idt,
- .store_gdt = native_store_gdt,
- .store_idt = native_store_idt,
- .store_tr = native_store_tr,
- .load_tls = native_load_tls,
- .write_ldt_entry = write_dt_entry,
- .write_gdt_entry = write_dt_entry,
- .write_idt_entry = write_dt_entry,
- .load_esp0 = native_load_esp0,
-
- .set_iopl_mask = native_set_iopl_mask,
- .io_delay = native_io_delay,
-
+ .pv_info = {
+ .name = "bare hardware",
+ .par...
2007 Oct 09
2
[PATCH RFC REPOST 1/2] paravirt: refactor struct paravirt_ops into smaller pv_*_ops
...lock = native_sched_clock,
- .get_cpu_khz = native_calculate_cpu_khz,
- .load_tr_desc = native_load_tr_desc,
- .set_ldt = native_set_ldt,
- .load_gdt = native_load_gdt,
- .load_idt = native_load_idt,
- .store_gdt = native_store_gdt,
- .store_idt = native_store_idt,
- .store_tr = native_store_tr,
- .load_tls = native_load_tls,
- .write_ldt_entry = write_dt_entry,
- .write_gdt_entry = write_dt_entry,
- .write_idt_entry = write_dt_entry,
- .load_esp0 = native_load_esp0,
-
- .set_iopl_mask = native_set_iopl_mask,
- .io_delay = native_io_delay,
-
+ .pv_info = {
+ .name = "bare hardware",
+ .par...
2019 Jul 15
5
[PATCH 0/2] Remove 32-bit Xen PV guest support
The long term plan has been to replace Xen PV guests by PVH. The first
victim of that plan are now 32-bit PV guests, as those are used only
rather seldom these days. Xen on x86 requires 64-bit support and with
Grub2 now supporting PVH officially since version 2.04 there is no
need to keep 32-bit PV guest support alive in the Linux kernel.
Additionally Meltdown mitigation is not available in the
2019 Jul 15
5
[PATCH 0/2] Remove 32-bit Xen PV guest support
The long term plan has been to replace Xen PV guests by PVH. The first
victim of that plan are now 32-bit PV guests, as those are used only
rather seldom these days. Xen on x86 requires 64-bit support and with
Grub2 now supporting PVH officially since version 2.04 there is no
need to keep 32-bit PV guest support alive in the Linux kernel.
Additionally Meltdown mitigation is not available in the