Displaying 8 results from an estimated 8 matches for "load27".
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load2
2015 Sep 20
2
simplifycfg not happening?
...a, i64 %index13, !dbg !24
%18 = bitcast double* %17 to <2 x double>*, !dbg !26
%wide.load26 = load <2 x double>, <2 x double>* %18, align 8, !dbg !26
%19 = getelementptr double, double* %17, i64 2, !dbg !26
%20 = bitcast double* %19 to <2 x double>*, !dbg !26
%wide.load27 = load <2 x double>, <2 x double>* %20, align 8, !dbg !26
%21 = fmul <2 x double> %wide.load26, <double 2.000000e+00, double
2.000000e+00>, !dbg !26
%22 = fmul <2 x double> %wide.load27, <double 2.000000e+00, double
2.000000e+00>, !dbg !26
%23 = bitcast dou...
2015 Sep 20
2
simplifycfg not happening?
...tcast double* %17 to <2 x double>*, !dbg !26
>> %wide.load26 = load <2 x double>, <2 x double>* %18, align 8, !dbg !26
>> %19 = getelementptr double, double* %17, i64 2, !dbg !26
>> %20 = bitcast double* %19 to <2 x double>*, !dbg !26
>> %wide.load27 = load <2 x double>, <2 x double>* %20, align 8, !dbg !26
>> %21 = fmul <2 x double> %wide.load26, <double 2.000000e+00, double
>> 2.000000e+00>, !dbg !26
>> %22 = fmul <2 x double> %wide.load27, <double 2.000000e+00, double
>> 2.000000e+...
2016 Jun 15
3
[Proposal][RFC] Strided Memory Access Vectorization
...considered as identical (From valid element perspective).
* SkipFactor = (Stride - (VF % Stride)) % Stride)
For example:
How LOAD is modeled:
Load stride 3 (i.e. load for b [ 3 * i ])
%5 = getelementptr inbounds i32, i32* %b, i64 %.lhs
%6 = bitcast i32* %5 to <4 x i32>*
%stride.load27 = load <4 x i32>, <4 x i32>* %6, align 1, !tbaa !1
%7 = getelementptr i32, i32* %5, i64 6
%8 = bitcast i32* %7 to <4 x i32>*
%stride.load28 = load <4 x i32>, <4 x i32>* %8, align 1, !tbaa !1
%strided.vec29 = shufflevector <4 x i32> %stride.load27, <4 x...
2016 Jun 18
2
[Proposal][RFC] Strided Memory Access Vectorization
...ctive).
> * SkipFactor = (Stride - (VF % Stride)) % Stride)
>
> For example:
>
>
> How LOAD is modeled:
> Load stride 3 (i.e. load for b [ 3 * i ])
> %5 = getelementptr inbounds i32, i32* %b, i64 %.lhs
> %6 = bitcast i32* %5 to <4 x i32>*
> %stride.load27 = load <4 x i32>, <4 x i32>* %6, align 1, !tbaa !1
> %7 = getelementptr i32, i32* %5, i64 6
> %8 = bitcast i32* %7 to <4 x i32>*
> %stride.load28 = load <4 x i32>, <4 x i32>* %8, align 1, !tbaa !1
> %strided.vec29 = shufflevector <4 x i32> %st...
2016 Jun 30
0
[Proposal][RFC] Strided Memory Access Vectorization
...- (VF % Stride)) % Stride)
> >
> > For example:
> >
> >
> > How LOAD is modeled:
> > Load stride 3 (i.e. load for b [ 3 * i ])
> > %5 = getelementptr inbounds i32, i32* %b, i64 %.lhs
> > %6 = bitcast i32* %5 to <4 x i32>*
> > %stride.load27 = load <4 x i32>, <4 x i32>* %6, align 1, !tbaa !1
> > %7 = getelementptr i32, i32* %5, i64 6
> > %8 = bitcast i32* %7 to <4 x i32>*
> > %stride.load28 = load <4 x i32>, <4 x i32>* %8, align 1, !tbaa !1
> > %strided.vec29 = shufflevector...
2016 Jun 30
1
[Proposal][RFC] Strided Memory Access Vectorization
...- (VF % Stride)) % Stride)
> >
> > For example:
> >
> >
> > How LOAD is modeled:
> > Load stride 3 (i.e. load for b [ 3 * i ])
> > %5 = getelementptr inbounds i32, i32* %b, i64 %.lhs
> > %6 = bitcast i32* %5 to <4 x i32>*
> > %stride.load27 = load <4 x i32>, <4 x i32>* %6, align 1, !tbaa !1
> > %7 = getelementptr i32, i32* %5, i64 6
> > %8 = bitcast i32* %7 to <4 x i32>*
> > %stride.load28 = load <4 x i32>, <4 x i32>* %8, align 1, !tbaa !1
> > %strided.vec29 = shufflevector...
2013 Jul 05
0
[LLVMdev] Enabling vectorization with LLVM 3.3 for a DSL emitting LLVM IR
On 07/04/2013 01:39 PM, Stéphane Letz wrote:
> Hi,
>
> Our DSL can generate C or directly generate LLVM IR. With LLVM 3.3, we can vectorize the C produced code using clang with -O3, or clang with -O1 then opt -O3 -vectorize-loops. But the same program generating LLVM IR version cannot be vectorized with opt -O3 -vectorize-loops. So our guess is that our generated LLVM IR lacks some
2013 Jul 04
3
[LLVMdev] Enabling vectorization with LLVM 3.3 for a DSL emitting LLVM IR
Hi,
Our DSL can generate C or directly generate LLVM IR. With LLVM 3.3, we can vectorize the C produced code using clang with -O3, or clang with -O1 then opt -O3 -vectorize-loops. But the same program generating LLVM IR version cannot be vectorized with opt -O3 -vectorize-loops. So our guess is that our generated LLVM IR lacks some informations that are needed by the vectorization passes to