search for: lmain

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2012 Aug 07
2
[LLVMdev] ARM eabi calling convention
...ackend can figure out that "[2 x i32] %0" was originally a structure consisting of a single double field. When I run llc, it looks like "%0" is being passed in register r1 and r2. *$ llc vararg1-main.ll -o - ldr r0, .LCPI0_0 ldm r0, {r1, r2} .LCPI0_0: .long .Lmain.s0 ... .Lmain.s0: .long 0 @ double 2.000000e+00 * I am running tests to see if llc targeting mips can correctly compile a bitcode file generated by clang-arm. One of the tests is failing, and I was wondering whether this could be a bug in arm-specific part of clang....
2012 Aug 07
0
[LLVMdev] ARM eabi calling convention
...quot; was > originally a structure consisting of a single double field. When I run llc, > it looks like "%0" is being passed in register r1 and r2. > > $ llc vararg1-main.ll -o - > > ldr r0, .LCPI0_0 > ldm r0, {r1, r2} > > .LCPI0_0: > .long .Lmain.s0 > ... > .Lmain.s0: > .long 0 @ double 2.000000e+00 > > > I am running tests to see if llc targeting mips can correctly compile a > bitcode file generated by clang-arm. > One of the tests is failing, and I was wondering whether this could be...
2020 Jul 15
2
[MTE] Tagging Globals
...s is still in progress? int global_array[16]; int main(int argc, char **argv) { global_array[1] = 0; return global_array[argc + 16]; // BOOM } clang++ -O1 --target=aarch64-linux -march=armv8.5a+memtag -fsanitize=memtag test.cpp -S -o test.s main: // @main .Lmain$local: // %bb.0: // %entry adrp x8, global_array add x8, x8, :lo12:global_array str wzr, [x8, #4] add x8, x8, w0, sxtw #2 ldr w0, [x8, #64] ret .Lfunc_end0: .size main, .Lfunc_end0-main -----...
2020 Jul 15
2
[MTE] Tagging Globals
...s is still in progress? int global_array[16]; int main(int argc, char **argv) { global_array[1] = 0; return global_array[argc + 16]; // BOOM } clang++ -O1 --target=aarch64-linux -march=armv8.5a+memtag -fsanitize=memtag test.cpp -S -o test.s main: // @main .Lmain$local: // %bb.0: // %entry adrp x8, global_array add x8, x8, :lo12:global_array str wzr, [x8, #4] add x8, x8, w0, sxtw #2 ldr w0, [x8, #64] ret .Lfunc_end0: .size main, .Lfunc_end0-main _____...
2012 Aug 07
0
[LLVMdev] ARM eabi calling convention
On Aug 6, 2012, at 3:21 PM, Akira Hatanaka <ahatanak at gmail.com> wrote: > When I compile this program > > $ cat vararg1-main.c > > typedef struct { > double d; > } S0; > > S0 g1; > > void foo0(int a, ...); > > int main(int argc, char **argv) { > S0 s0 = { 2.0 }; > > foo0(1, s0); > > printf("%f\n", g1.d); >
2012 Aug 07
2
[LLVMdev] ARM eabi calling convention
...consisting of a single double field. When I run llc, >> it looks like "%0" is being passed in register r1 and r2. >> >> $ llc vararg1-main.ll -o - >> >> ldr r0, .LCPI0_0 >> ldm r0, {r1, r2} >> >> .LCPI0_0: >> .long .Lmain.s0 >> ... >> .Lmain.s0: >> .long 0 @ double 2.000000e+00 >> >> >> I am running tests to see if llc targeting mips can correctly compile a >> bitcode file generated by clang-arm. >> One of the tests is failing, and I wa...
2015 Apr 20
2
[LLVMdev] question about alignment of structures on the stack (arm 32)
Dear community, I faced with code which was generated by llvm, assembly instructions of that code is relying on 8-bytes alignment for structures on the stack. The part of Objective C code is following: -(void)getCharacters:(unichar *)unicode {     NSRange range;     range.location = 0;     range.length = [self length];     printf("%p, %p\n", &range.location, &range.length); And
2012 Aug 06
2
[LLVMdev] ARM eabi calling convention
When I compile this program *$ cat vararg1-main.c typedef struct { double d; } S0; S0 g1; void foo0(int a, ...); int main(int argc, char **argv) { S0 s0 = { 2.0 }; foo0(1, s0); printf("%f\n", g1.d); * * return 0; }* with this command, *$ clang -target arm-none-linux-gnueabi-gcc -ccc-clang-archs armv7 -emit-llvm vararg1-main.c -S -o vararg1-main.ll -O3* I get this
2015 Apr 21
2
[LLVMdev] question about alignment of structures on the stack (arm 32)
...3 (tags/RELEASE_33/final) Target: armv7l-unknown-linux-gnueabi Thread model: posix ----- And we get following code of assembler language: main:     push    {r11, lr}     mov    r11, sp     sub    sp, sp, #24     mov    r0, #0     str    r0, [r11, #-4]     add    r1, sp, #8     movw    r2, :lower16:.Lmain.mStruct     movt    r2, :upper16:.Lmain.mStruct     vldr    d16, [r2]     vstr    d16, [sp, #8]     orr    r2, r1, #4     movw    r3, :lower16:.L.str     movt    r3, :upper16:.L.str     str    r0, [sp, #4]     mov    r0, r3     bl    printf     ldr    r1, [sp, #4]     str    r0, [sp]     mov    r0,...
2020 Jul 15
2
[MTE] Tagging Globals
...* global_array[1] = 0;* > > * return global_array[argc + 16]; // BOOM* > > *}* > > > > clang++ -O1 --target=aarch64-linux -march=armv8.5a+memtag > -fsanitize=memtag test.cpp -S -o test.s > > > > *main: // @main* > > *.Lmain$local:* > > *// %bb.0: // %entry* > > * adrp x8, global_array* > > * add x8, x8, :lo12:global_array* > > * str wzr, [x8, #4]* > > * add x8, x8, w0, sxtw #2* > > * ldr w0, [x8, #64...