Displaying 7 results from an estimated 7 matches for "llvm_v2f64_ty".
2010 Sep 12
2
[LLVMdev] GCCBuiltin and Intrinsic Mapping
...ve run into an issue specifying intrinsics for AVX.
Right now one can use GCCBuiltin to get automatic CBE (and other)
support for emitting intrinsics as gcc builtins. It looks like
this:
def int_x86_sse3_hadd_pd : GCCBuiltin<"__builtin_ia32_haddpd">,
Intrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty,
llvm_v2f64_ty], [IntrNoMem]>;
AVX has 128-bit instructions that work exactly like SSE instructions
except they have non-destructive operands. gcc defines intrinsics for
256-bit operations but does not define special intrinsics for 128-bit
AVX instruct...
2010 Sep 12
0
[LLVMdev] GCCBuiltin and Intrinsic Mapping
...intrinsics for AVX.
>
> Right now one can use GCCBuiltin to get automatic CBE (and other)
> support for emitting intrinsics as gcc builtins. It looks like
> this:
>
> def int_x86_sse3_hadd_pd : GCCBuiltin<"__builtin_ia32_haddpd">,
> Intrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty,
> llvm_v2f64_ty], [IntrNoMem]>;
>
> AVX has 128-bit instructions that work exactly like SSE instructions
> except they have non-destructive operands. gcc defines intrinsics for
> 256-bit operations but does not define special intrinsics f...
2009 Mar 24
0
[LLVMdev] Reducing .td redundancy
On Mar 23, 2009, at 5:56 PM, David Greene wrote:
> Is it legal to do something like a !strconcat on a non-string
> entity? That
> is, is there some operation that will let me do this (replace
> SOME_CONCAT with
> an appropriate operator):
I don't get it, can you try a simpler example on me? :)
-Chris
>
>
> (WARNING! Hacked-up tablegen ahead!)
>
>
2009 Mar 24
2
[LLVMdev] Reducing .td redundancy
Is it legal to do something like a !strconcat on a non-string entity? That
is, is there some operation that will let me do this (replace SOME_CONCAT with
an appropriate operator):
(WARNING! Hacked-up tablegen ahead!)
multiclass sse_fp_binop_bitwise_rm<bits<8> opc, string OpcodeStr,
SDNode OpNode> {
// Vector operation emulating scalar (fp)
2009 Mar 24
2
[LLVMdev] Reducing .td redundancy
..._add_ss : GCCBuiltin<"__builtin_ia32_addss">,
Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
llvm_v4f32_ty], [IntrNoMem, Commutative]>;
def int_x86_sse2_add_sd : GCCBuiltin<"__builtin_ia32_addsd">,
Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
llvm_v2f64_ty], [IntrNoMem, Commutative]>;
Untested multiclass! Look for SOME_CONCAT.
multiclass myintrinsics<bits<8> opc, string OpcodeStr, Intrinsic Intr> {
// Scalar intrinsics
def SSrr_Int SSI<opc, MRMSrcReg, (outs FR32:$dst), (...
2009 Jun 05
5
[LLVMdev] SSE Scalar Convert Intrinsics
I have a question about the SSE scalar convert intrinsics.
cvtsd2si is defined thusly:
def int_x86_sse2_cvtsd2si64 : GCCBuiltin<"__builtin_ia32_cvtsd2si64">,
Intrinsic<[llvm_i64_ty, llvm_v2f64_ty], [IntrNoMem]>;
This matches the signature of the GCC intrinsic. The fact that the GCC
intrinsic has a type mismatch on the input (vector rather than scalar)
is strange, but ok, we'll run with it.
Until this:
def Int_CVTSD2SIrm : SDI<0x2D, MRMSrcMem, (outs GR32:$dst), (ins f128mem:
$s...
2009 Jun 05
0
[LLVMdev] SSE Scalar Convert Intrinsics
...n Jun 5, 2009, at 8:51 AM, David Greene wrote:
> I have a question about the SSE scalar convert intrinsics.
>
> cvtsd2si is defined thusly:
>
> def int_x86_sse2_cvtsd2si64 :
> GCCBuiltin<"__builtin_ia32_cvtsd2si64">,
> Intrinsic<[llvm_i64_ty, llvm_v2f64_ty], [IntrNoMem]>;
>
> This matches the signature of the GCC intrinsic. The fact that the
> GCC
> intrinsic has a type mismatch on the input (vector rather than scalar)
> is strange, but ok, we'll run with it.
>
> Until this:
>
> def Int_CVTSD2SIrm : SDI<0x2D, M...