search for: llvm_int_load_masked

Displaying 2 results from an estimated 2 matches for "llvm_int_load_masked".

2013 May 02
0
[LLVMdev] Handling Masked Vector Operations
Hi David, > > It seems the only solution is to create an intrinsic: > > llvm_int_load_masked mask, [addr] > > But this unnecessarily shuts down optimization. > I think that using intrinsics is the right solution. I imagine that most interesting load/store optimizations happen before vectorization, so I am not sure how much we can gain by optimizing masked load/stores. > Si...
2013 May 02
8
[LLVMdev] Handling Masked Vector Operations
...ter the select, but that's too late. The load has already executed and the llvm passes will assume that load cannot fault (otherwise it's undefined behavior). The llvm IR does not convey the same semantics as the fully predicated IR. It seems the only solution is to create an intrinsic: llvm_int_load_masked mask, [addr] But this unnecessarily shuts down optimization. Similar problems exist with any trapping instruction (div, mod, etc.). It gets even worse when you consider than any floating point operation can trap on a signalling NaN input. The gpuocelot project is essentially trying to do the sam...