search for: llva

Is the source code for llva available esp the linux kernel port. Is there a project page for llva ? Mike On 2/3/06, John Criswell <criswell at cs.uiuc.edu> wrote: > Misha Brukman wrote: > > I don't know the current status of the LLVA project, so I will let the > > current developers chime in. Plea...

I don't know the current status of the LLVA project, so I will let the current developers chime in. Please send all LLVM and LLVA questions to llvmdev at cs.uiuc.edu . ----- Forwarded message from N O S P A M <ti_dak at yahoo.com> ----- Date: Tue, 17 Jan 2006 09:47:32 -0800 (PST) From: N O S P A M <ti_dak at yahoo.com> Subject...

Misha Brukman wrote: > I don't know the current status of the LLVA project, so I will let the > current developers chime in. Please send all LLVM and LLVA questions to > llvmdev at cs.uiuc.edu . My apologies for the late reply. > > ----- Forwarded message from N O S P A M <ti_dak at yahoo.com> ----- > > Date: Tue, 17 Jan 2006 09:47:32...

Hello everybody, I'm curious whether there have been any attempts to perform performance analysis on the LLVA level. I am interested in the derivation of flow-facts (loop bounds etc. - what about the value-range-propagation pass I read about on this list some time ago) but even more I am interested in exec-time modeling (how long does it take to execute a bunch of LLVA instructions on particular processor)...

On 4/2/07, Fabian Scheler <fabian.scheler at gmail.com> wrote: > Hello everybody, > > I'm curious whether there have been any attempts to perform > performance analysis on the LLVA level. I am interested in the > derivation of flow-facts (loop bounds etc. - what about the > value-range-propagation pass I read about on this list some time ago) > but even more I am interested in exec-time modeling (how long does it > take to execute a bunch of LLVA instructions on p...

I posted this question on the llvm channel on irc. I am new to all of this. And I only found out about LLVA as a result of the irc. And please forgive my erroneous terminology. So let me try this as best I can. I want to know if the code of LLVA/LLVM can be used as a virtual processor in configuring the linux kernel? Maybe you have already encountered this and possibly accomplished it as well. I want...

...(it doesn't help if you're > synthesizing a netlist from llvm, for example). > >> In particular, I'm investigating a proposal by Zack Rusin to use llvm as >> the shader compilation engine within Mesa, targeting GPU backends. > > Ok > >> It seems that LLVA and by extension Vector-LLVA assumes that looping and >> branching control flow can be expressed in terms of a simple "br" branch >> operation. > > LLVA is not a part of LLVM, so I won't answer for it. OK, I guess I misunderstood the papers I pulled down - my impre...

On Apr 3, 2007, at 10:55 AM, Andrew Lenharth wrote: > On 4/2/07, Fabian Scheler <fabian.scheler at gmail.com> wrote: >> Hello everybody, >> >> I'm curious whether there have been any attempts to perform >> performance analysis on the LLVA level. I am interested in the >> derivation of flow-facts (loop bounds etc. - what about the >> value-range-propagation pass I read about on this list some time ago) >> but even more I am interested in exec-time modeling (how long does it >> take to execute a bunch of LLVA i...

Hi All, can anyone tell me where I can find the sources for the llva-emu project? I've tried to contact  Michael Brukman or Brian Gaeke but no reply. thank you for any help, dacian -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20130719/94fcf74b/attachment.html>

On 7/19/13 3:20 AM, Herbei Dacian wrote: > > > Hi All, > can anyone tell me where I can find the sources for the llva-emu project? The llva-emu code is extremely old and, as I recall, not very feature-filled. It was also done for a class project (I don't think it was used for the original LLVA publication, and it wasn't used for any of the subsequent LLVA/SVA publications on which I worked). For what...

...ns which llvm makes about the types of hardware it is capable of targeting. In particular, I'm investigating a proposal by Zack Rusin to use llvm as the shader compilation engine within Mesa, targeting GPU backends. I'm aware of the Apple GLSL compiler, and also I've seen the Vector LLVA paper. However, I'm not sure that either of these quite bridges the gap to the execution environment provided by modern GPUs. Though there are a couple of question marks, I'll pick the most obvious one: It seems that LLVA and by extension Vector-LLVA assumes that looping and branchin...

> > LLVA specifically is refering to a research project offshoot of llvm. > > LLVM instructions do not have 1:1 mappings to native instructions > > (sometimes multiple llvm instructions map to fewer native insts, > > sometimes the other way around). > > That's correct, and furthe...

On Sat, 19 May 2007, Keith Whitwell wrote: >>> It seems that LLVA and by extension Vector-LLVA assumes that looping and >>> branching control flow can be expressed in terms of a simple "br" branch >>> operation. >> >> LLVA is not a part of LLVM, so I won't answer for it. > > OK, I guess I misunderstood the papers...

...devices, but isn't fully general (it doesn't help if you're synthesizing a netlist from llvm, for example). > In particular, I'm investigating a proposal by Zack Rusin to use llvm as > the shader compilation engine within Mesa, targeting GPU backends. Ok > It seems that LLVA and by extension Vector-LLVA assumes that looping and > branching control flow can be expressed in terms of a simple "br" branch > operation. LLVA is not a part of LLVM, so I won't answer for it. > Typically GPU environments cannot provide such a facility as they tend >...

...rator + implementation of OS services for > a given > target). The goal here is to abstract away the hardware from the OS, > using > these magical `intrinsics' that were mentioned. This means that Linux > is ported > to run on a fundamentally new architecture, which we call LLVA. You > can see > our MICRO paper on this topic: > > http://llvm.cs.uiuc.edu/pubs/2003-10-01-LLVA.html The above paper describes LLVA as a virtual instruction set for new processor designs. But in the context of Linux, LLVA can be a way to virtualize the processor even for ordinar...

There is a strange Writable Instruction Set Computing CPU from Imsys (Sweden) based on FPGA. Is it possible to setup the IMSYS CPU for running applications based on LLVA/LLVM? Thank you. Swedish microprocessor developer Imsys Technologies has released three devices in its reconfigurable family of processors. Unveiled at the Microprocessor Forum in San Jose, each device combines the processor with application specific soft peripherals, optimised for wired or wirele...

...ion but > > > more for a proof-of-concept and ongoing research potential. > > > > You're being too modest, Misha --- this is going to be the Linux of > > the future :) > > I'll add my pragmatist $0.02 worth here. Take it with a grain of salt. > > If LLVA isn't "real world" or "intended for end-user", how valuable is > it as a research tool? Perhaps I should say what I really meant to say instead of vaguely generalizing. :) The thing that will exist at some point (hopefully soon) will be essentially an emulator for LLV...

Currently I have a trick to extract the correlation information of LLVA and ISA. By adding an intrinsic instruction and comparing the emitted binary with the original one. The location of machine instruction that I am interested in is calculated relative to the intrinsic instruction. Unless I change the original instruction with the intrinsic having a same size, this n...

...the processor, and I/O is handled by transporting data into a special function unit. > In that case, you would not > use a "system call" intrinsic; Correct. > you would use an ioread/iowrite intrinsic > (these are similar to load/store and are briefly documented in the > LLVA-OS paper). Which I should probably read, it seems. If you're doing memory mapped I/O, you could probably > use LLVM volatile load/store instructions and not have to add any > intrinsics. We could do memory mapped I/O, but I don't thing it is being considered. > Second, you c...

...es it do I/O. Right? > >> In that case, you would not >> use a "system call" intrinsic; >> > > Correct. > > >> you would use an ioread/iowrite intrinsic >> (these are similar to load/store and are briefly documented in the >> LLVA-OS paper). >> > > Which I should probably read, it seems. > The LLVA-OS paper contains descriptions of intrinsics that we would add to LLVM to support an operating system. In our implementation, we wrote them all as external library functions. While I suspect that most of...