search for: llabel2

...rent? Ciao, Duncan. .file "selector.ll" .text .align 16 .globl f .type f, at function f: # @f .Leh_func_begin1: # BB#0: # %e subq $8, %rsp .Llabel4: .Llabel1: callq g .Llabel2: # BB#1: # %c addq $8, %rsp ret .LBB1_2: # %u .Llabel3: addq $8, %rsp ret .size f, .-f .Leh_func_end1: .section .gcc_except_table,"a", at progbits .align 4 GCC_except_ta...

...erEiA_l .type _ZN4N0014Main5test5EN2IO6WriterEiA_l, at function _ZN4N0014Main5test5EN2IO6WriterEiA_l: # @_ZN4N0014Main5test5EN2IO6WriterEiA_l .Leh_func_begin153: .Lfunc_begin153: .LBB153_0: # %entry subq $56, %rsp .Llabel294: .LBB153_1: movq %rdi, 24(%rsp) movq %rsi, 48(%rsp) movl %edx, 44(%rsp) movq %rcx, 32(%rsp) .LBB153_2: # %.try_body movq 32(%rsp), %rdi .Llabel291: addq $16, %rdi xorb %al, %al call _Unwind_Ra...

...movdi_1_rex64, floatdidf2_sse_interunit and other patterns and study how they work. How to make the same annotation for clang output assembler code? test: .Leh_func_begin1: pushq %rbp # ??? what insn in X86InstrInfo.td? .Llabel1: movq %rsp, %rbp # ??? what insn in X86InstrInfo.td? .Llabel2: movq %rdi, -16(%rbp) # ??? what insn in X86InstrInfo.td? movq -16(%rbp), %rax # ??? what insn in X86InstrInfo.td? cvtsi2sdq %rax, %xmm0 # ??? what insn in X86InstrInfo.td? movsd %xmm0, -8(%rbp) # ??? what insn in X86InstrInfo.td? movsd -8(%rbp), %xmm0 # ??? what insn in X86InstrIn...

Hi, I'm trying to get exception handling working in my compiler targetting LLVM. I've been working from the LLVM exception handling documentation (including http://llvm.org/docs/ExceptionHandling.html and http://wiki.llvm.org/HowTo:_Build_JIT_based_Exception_mechanism) and looking at g++-llvm's output. I've been trying to get a minimal test function to work, which simply invokes

...r > patterns and study how they work. > > How to make the same annotation for clang output assembler code? > > test: > .Leh_func_begin1: > pushq %rbp # ??? what insn in X86InstrInfo.td? > .Llabel1: > movq %rsp, %rbp # ??? what insn in X86InstrInfo.td? > .Llabel2: > movq %rdi, -16(%rbp) # ??? what insn in X86InstrInfo.td? > movq -16(%rbp), %rax # ??? what insn in X86InstrInfo.td? > cvtsi2sdq %rax, %xmm0 # ??? what insn in X86InstrInfo.td? > movsd %xmm0, -8(%rbp) # ??? what insn in X86InstrInfo.td? > movsd -8(%rbp), %xmm0 # ??? wha...

...test5EN2IO6WriterEiA_l, at function > _ZN4N0014Main5test5EN2IO6WriterEiA_l: # > @_ZN4N0014Main5test5EN2IO6WriterEiA_l > .Leh_func_begin153: > .Lfunc_begin153: > .LBB153_0: # %entry > subq $56, %rsp > .Llabel294: > > .LBB153_1: > movq %rdi, 24(%rsp) > movq %rsi, 48(%rsp) > movl %edx, 44(%rsp) > movq %rcx, 32(%rsp) > .LBB153_2: # %.try_body > movq 32(%rsp), %rdi > .Llabel291: > > addq...

...i32 @test(i32 %argc) { entry: %tmp2 = sdiv i32 2, %argc to label %continue unwind to label %unwindblock ; <i32> [#uses=1] continue: ret i32 %tmp2 unwindblock: unwind } And here is the resulting x86 code (Llabel1 was supposed to be before the {ctld, idvl} and Llabel2 which was after is not generated) test: .Leh_func_begin1: .Llabel4: movl $2, %eax movl 4(%esp), %ecx cltd idivl %ecx .Llabel1: .LBB1_1: # continue ret .LBB1_2: # unwindblock Thanks Duncan, Nicolas

...he two addl is using a wrong address to store the result (%esp points to %dummy, but the result should not be stored there). ------------------------------------------------------------------------ .text .align 16 .def _tmp; .scl 3; .type 32; .endef _tmp: pushl %ebp Llabel1: movl %esp, %ebp Llabel2: pushl %ebx pushl %edi pushl %esi subl $4, %esp LBB1_1: # entry2 movl $8, %esi movl %esi, %eax call __alloca movl %esp, %edi movl %esi, %eax call __alloca movl %esp, %ebx movl %esi, %eax call __alloca movl %esp, -16(%ebp) movl %esi, %eax call __alloca movl 8(%ebp), %eax movl %eax,...

...work. >> >> How to make the same annotation for clang output assembler code? >> >> test: >> .Leh_func_begin1: >>  pushq %rbp          # ??? what insn in X86InstrInfo.td? >> .Llabel1: >>  movq  %rsp, %rbp  # ??? what insn in X86InstrInfo.td? >> .Llabel2: >>  movq  %rdi, -16(%rbp)  # ??? what insn in X86InstrInfo.td? >>  movq  -16(%rbp), %rax  # ??? what insn in X86InstrInfo.td? >>  cvtsi2sdq %rax, %xmm0  # ??? what insn in X86InstrInfo.td? >>  movsd %xmm0, -8(%rbp)  # ??? what insn in X86InstrInfo.td? >>  movsd -8(%rb...

Hi Nicolas, > In order to have exceptions for non-call instructions (such as sdiv, > load or stores), I'm modifying codegen so that it generates a BeginLabel > and an EndLabel between the "may throwing" instruction. This is what the > codegen of an InvokeInst does. the rule is that all instructions between eh begin labelN and eh end labelN must unwind to the same

Hi everyone, In order to have exceptions for non-call instructions (such as sdiv, load or stores), I'm modifying codegen so that it generates a BeginLabel and an EndLabel between the "may throwing" instruction. This is what the codegen of an InvokeInst does. However, when generating native code, only BeginLabel is generated, and it is generated after the instruction. I'm not