search for: ljmp

Displaying 20 results from an estimated 21 matches for "ljmp".

Did you mean: jmp
2008 Jun 24
2
Debugging
...(gdb) target remote localhost:1234 Remote debugging using localhost:1234 0x0000fff0 in ?? () at localboot.inc:68 68 jmp kaboom ; If we returned, oh boy... How does "jmp kaboom" get here? We are at the BIOS entry point: (gdb) display/10i $cs*16+$eip 1: x/10i $cs * 16 + $eip 0xffff0: ljmp $0xf000,$0xe05b [...] (gdb) info symbol 0x7c00 bootsec in section .text (gdb) b bootsec Note: breakpoint -2 also set at pc 0x7c00. Breakpoint 1 at 0x7c00: file extlinux.asm, line 146. Breakpoint -2? That's new for me. Anyway: (gdb) c Continuing. ^C Program received signal SIGINT, Interrup...
2007 Jun 27
0
[PATCH 1/10] Provide basic Xen PM infrastructure
...symbols in that area + movl $BOOT_TRAMPOLINE, %eax + shrl $4, %eax + movl %eax, %fs + lidt %fs:bootsym(idt_48) + lgdt %fs:bootsym(gdt_48) + + movw $1, %ax + lmsw %ax # Turn on CR0.PE + jmp 1f +1: + ljmpl $BOOT_CS32, $bootsym_phys(wakeup_32) + +/* This code uses an extended set of video mode numbers. These include: + * Aliases for standard modes + * NORMAL_VGA (-1) + * EXTENDED_VGA (-2) + * ASK_VGA (-3) + * Video modes numbered by menu position -- NOT RECOMMENDED because of lack +...
2007 Jun 20
6
Vmware crashes if compress/misc.c scrolls?
I just got the following message on the syslinux mailing list: > 2. On some platforms (vmware for example :), READING from the video memory > in the 32bit mode is impossible (causes an exeption). Taking in to account > that the scroll function in ilinux/arch/i386/boot/compressed/misc.c > works using a memcpy of the video memory, when the linux bootsector is given >
2007 Jun 20
6
Vmware crashes if compress/misc.c scrolls?
I just got the following message on the syslinux mailing list: > 2. On some platforms (vmware for example :), READING from the video memory > in the 32bit mode is impossible (causes an exeption). Taking in to account > that the scroll function in ilinux/arch/i386/boot/compressed/misc.c > works using a memcpy of the video memory, when the linux bootsector is given >
2007 Jun 20
6
Vmware crashes if compress/misc.c scrolls?
I just got the following message on the syslinux mailing list: > 2. On some platforms (vmware for example :), READING from the video memory > in the 32bit mode is impossible (causes an exeption). Taking in to account > that the scroll function in ilinux/arch/i386/boot/compressed/misc.c > works using a memcpy of the video memory, when the linux bootsector is given >
2015 Aug 23
0
[PATCH] efi: leaving long mode in kernel_jump routine
...mov %rsi, %rbx + + call base_address +base_address: + pop %rsi + + /* need to perform a long jump to update cs + + /* load absolute address of pm_code in jmp_address location */ + lea (pm_code - base_address)(%rsi, 1), %rax + mov %eax, (jmp_address - base_address)(%rsi, 1) + + ljmp *(jmp_address - base_address)(%rsi, 1) + +jmp_address: + .long 0 /* address */ + .word 0x10 /* segment */ .code32 pm_code: - /* Disable IA-32e mode by clearing IA32_EFER.LME */ - xorl %eax, %eax - xorl %edx, %edx - movl $MSR_EFER, %ecx - wrmsr + /* cs seg...
2015 Aug 04
13
[PATCH] efi: leaving long mode in kernel_jump routine
...l_jump function) */ + mov %rsi, %rbx + + call base_address +base_address: + pop %rsi + + /* need to perform a long jump to update cs + + /* load absolute address of pm_code in jmp_address location */ + lea (pm_code - base_address)(%rsi, 1), %rax + mov %eax, (jmp_address - base_address)(%rsi, 1) + + ljmp *(jmp_address - base_address)(%rsi, 1) + +jmp_address: + .long 0 /* address */ + .word 0x10 /* segment */ .code32 pm_code: - /* Disable IA-32e mode by clearing IA32_EFER.LME */ - xorl %eax, %eax - xorl %edx, %edx - movl $MSR_EFER, %ecx - wrmsr + /* cs segment has been updated, now update th...
2007 Feb 14
4
[PATCH 3/12] Provide basic Xen PM infrastructure
...# set up page table +#ifndef __XEN__ movl $swsusp_pg_dir-__PAGE_OFFSET, %eax +#else + movl $idle_pg_table-__PAGE_OFFSET, %eax +#endif movl %eax, %cr3 testl $1, real_efer_save_restore - wakeup_code @@ -88,7 +97,11 @@ 1: cmpl $0x12345678, %eax jne bogus_real_magic +#ifndef __XEN__ ljmpl $__KERNEL_CS,$wakeup_pmode_return +#else + ljmpl $(__HYPERVISOR_CS),$wakeup_pmode_return +#endif real_save_gdt: .word 0 .long 0 @@ -184,7 +197,11 @@ ENTRY(wakeup_end) .org 0x1000 wakeup_pmode_return: +#ifndef __XEN__ movw $__KERNEL_DS, %ax +#else + movw $__HYPERVISOR_DS, %ax +#end...
2007 Apr 18
1
[PATCH 0/7] Using %gs for per-cpu areas on x86
OK, here it is. Benchmarks still coming. This is against Andi's 2.6.18-rc7-git3 tree, and replaces the patches between (and not including) i386-pda-asm-offsets and i386-early-fault. One patch is identical, one is mildly modified, the rest are re-implemented but inspired by Jeremy's PDA work. Thanks, Rusty. -- Help! Save Australia from the worst of the DMCA: http://linux.org.au/law
2007 Apr 18
1
[PATCH 0/7] Using %gs for per-cpu areas on x86
OK, here it is. Benchmarks still coming. This is against Andi's 2.6.18-rc7-git3 tree, and replaces the patches between (and not including) i386-pda-asm-offsets and i386-early-fault. One patch is identical, one is mildly modified, the rest are re-implemented but inspired by Jeremy's PDA work. Thanks, Rusty. -- Help! Save Australia from the worst of the DMCA: http://linux.org.au/law
2007 May 31
1
[patch rfc wip] first cut of ELF bzImage
...hoff + .int 0 # e_flags + .word e_ehdr - ehdr # e_ehsize + .word e_phdr1 - phdr # e_phentsize + .word (e_phdr - phdr)/(e_phdr1 - phdr) # e_phnum + .word 40 # e_shentsize + .word 0 # e_shnum + .word 0 # e_shstrndx +e_ehdr: + + .org 71 +normalize: # Normalize the start address ljmp $BOOTSEG, $start2 + + .org 80 +phdr: + .int PT_LOAD # p_type + .int _text # p_offset + .int 0x8000 # p_vaddr + .int 0x8000 # p_paddr + .int _filesz # p_filesz + .int _memsz # p_memsz + .int PF_R | PF_W | PF_X # p_flags + .int 4 # p_align +e_phdr1: + .int PT_LOAD...
2007 May 31
1
[patch rfc wip] first cut of ELF bzImage
...hoff + .int 0 # e_flags + .word e_ehdr - ehdr # e_ehsize + .word e_phdr1 - phdr # e_phentsize + .word (e_phdr - phdr)/(e_phdr1 - phdr) # e_phnum + .word 40 # e_shentsize + .word 0 # e_shnum + .word 0 # e_shstrndx +e_ehdr: + + .org 71 +normalize: # Normalize the start address ljmp $BOOTSEG, $start2 + + .org 80 +phdr: + .int PT_LOAD # p_type + .int _text # p_offset + .int 0x8000 # p_vaddr + .int 0x8000 # p_paddr + .int _filesz # p_filesz + .int _memsz # p_memsz + .int PF_R | PF_W | PF_X # p_flags + .int 4 # p_align +e_phdr1: + .int PT_LOAD...
2007 Apr 18
5
[patch 0/5] i386-gdt-pda i386 gdt and pda updates
Hi Andrew, This patch series adds to the end of the existing i386-gdt-cleanups patches: allow-per-cpu-variables-to-be-page-aligned.patch i386-gdt-cleanups-use-per-cpu-variables-for-gdt-pda.patch i386-gdt-cleanups-use-per-cpu-gdt-immediately-upon-boot.patch i386-gdt-cleanups-use-per-cpu-gdt-immediately-upon-boot-fix.patch i386-gdt-cleanups-clean-up-cpu_init.patch
2007 Apr 18
5
[patch 0/5] i386-gdt-pda i386 gdt and pda updates
Hi Andrew, This patch series adds to the end of the existing i386-gdt-cleanups patches: allow-per-cpu-variables-to-be-page-aligned.patch i386-gdt-cleanups-use-per-cpu-variables-for-gdt-pda.patch i386-gdt-cleanups-use-per-cpu-gdt-immediately-upon-boot.patch i386-gdt-cleanups-use-per-cpu-gdt-immediately-upon-boot-fix.patch i386-gdt-cleanups-clean-up-cpu_init.patch
2007 Apr 18
3
Per-cpu patches on top of PDA stuff...
Hi Jeremy, all, Sorry this took so long, spent last week in Japan at OSDL conf then netconf. After several false starts, I ended up with a very simple implementation, which clashes significantly with your work since then 8(. I've pushed the patches anyway, but it's going to be significant work for me to re-merge them, so I wanted your feedback first. The first patch simply changes
2007 Apr 18
3
Per-cpu patches on top of PDA stuff...
Hi Jeremy, all, Sorry this took so long, spent last week in Japan at OSDL conf then netconf. After several false starts, I ended up with a very simple implementation, which clashes significantly with your work since then 8(. I've pushed the patches anyway, but it's going to be significant work for me to re-merge them, so I wanted your feedback first. The first patch simply changes
2007 Apr 18
8
[patch 0/6] i386 gdt and percpu cleanups
Hi Andi, This is a series of patches based on your latest queue (as of the other day, at least). It includes: - the most recent patch to compute the appropriate amount of percpu space to allocate, using a separate reservation for modules where needed. - make the percpu sections page-aligned, so that percpu variables can be page aligned if needed (which is used by gdt_page) -
2007 Apr 18
8
[patch 0/6] i386 gdt and percpu cleanups
Hi Andi, This is a series of patches based on your latest queue (as of the other day, at least). It includes: - the most recent patch to compute the appropriate amount of percpu space to allocate, using a separate reservation for modules where needed. - make the percpu sections page-aligned, so that percpu variables can be page aligned if needed (which is used by gdt_page) -
2007 Apr 18
31
[PATCH 00/28] Updates for firstfloor paravirt-ops patches
Hi Andi, This is a set of updates for the firstfloor patch queue. Quick rundown: revert-mm-x86_64-mm-account-for-module-percpu-space-separately-from-kernel-percpu.patch separate-module-percpu-space.patch Update the module percpu accounting patch fix-ff-allow-percpu-variables-to-be-page-aligned.patch Make sure the percpu memory allocation is page-aligned
2007 Apr 18
31
[PATCH 00/28] Updates for firstfloor paravirt-ops patches
Hi Andi, This is a set of updates for the firstfloor patch queue. Quick rundown: revert-mm-x86_64-mm-account-for-module-percpu-space-separately-from-kernel-percpu.patch separate-module-percpu-space.patch Update the module percpu accounting patch fix-ff-allow-percpu-variables-to-be-page-aligned.patch Make sure the percpu memory allocation is page-aligned