search for: livestacks

...stack slot overlay for frame size reduction, after register allocation phase. And this transformation pass relies on the LiveStack analysis pass. How, when checking the source code, it seems the LiveStack analysis has not been implemented, since the code was found in LiveStackAnalysis.cpp: *bool LiveStacks::runOnMachineFunction(MachineFunction &MF) {* * TRI = MF.getTarget().getRegisterInfo();* * // FIXME: No analysis is being done right now. We are relying on the* * // register allocators to provide the information.* * return false;* *}* And I found the greedy register allocator did nothing...

...; And this transformation pass relies on the LiveStack analysis pass. > > > > > > How, when checking the source code, it seems the LiveStack analysis > > has not been implemented, since the code was found in > > LiveStackAnalysis.cpp: > > > > > > bool LiveStacks::runOnMachineFunction(MachineFunction &MF) { > > TRI = MF.getTarget().getRegisterInfo(); > > // FIXME: No analysis is being done right now. We are relying on the > > // register allocators to provide the information. > > return false; > > } > > > > >...

...ke to use the Strong Phi Elimination pass. I am doing the following in my allocator virtual void getAnalysisUsage(AnalysisUsage &AU) const { AU.addRequiredID(MachineDominatorsID); AU.addRequiredID(StrongPHIEliminationID); // Eliminate PHI nodes AU.addRequired<LiveStacks>(); AU.addPreserved<LiveStacks>(); AU.addRequired<MachineLoopInfo>(); AU.addPreserved<MachineLoopInfo>(); MachineFunctionPass::getAnalysisUsage(AU); } but I get the following error at runtime Unable to schedule 'MachineDominator Tree Constructi...

...oc -dead-mi-elimination -machinedomtree -machine-loops -machinelicm -machine-cse -machine-sink -peephole-opts -unreachable-mbb-elimination -livevars -phi-node-elimination -twoaddressinstruction -processimpdefs -slotindexes -liveintervals -livedebugvars -simple-register-coalescing -calcspillweights -livestacks -virtregmap -edge-bundles -spill-code-placement -stack-slot-coloring -machinelicm -edge-bundles -prologepilog -branch-folder -tailduplication -machine-cp -postrapseudos -machinedomtree -machine-loops -post-RA-sched -gc-analysis -machine-block-freq -block-placement2 -machinedomtree -machine-loops N...

...achine-block-freq -machine-sink -peephole-opts -dead-mi-elimination -processimpdefs -unreachable-mbb-elimination -livevars -machinedomtree -machine-loops -phi-node-elimination -twoaddressinstruction -slotindexes -liveintervals -simple-register-coalescing -misched -machine-block-freq -livedebugvars -livestacks -virtregmap -liveregmatrix -edge-bundles -spill-code-placement -virtregrewriter -stack-slot-coloring -machinelicm -edge-bundles -prologepilog -machine-block-freq -branch-folder -tailduplication -machine-cp -postrapseudos -machinedomtree -machine-loops -post-RA-sched -gc-analysis -machine-block-freq...

...gt; -machinedomtree -machine-loops -machinelicm -machine-cse -machine-sink > -peephole-opts -unreachable-mbb-elimination -livevars > -phi-node-elimination -twoaddressinstruction -processimpdefs > -slotindexes -liveintervals -livedebugvars -simple-register-coalescing > -calcspillweights -livestacks -virtregmap -edge-bundles > -spill-code-placement -stack-slot-coloring -machinelicm -edge-bundles > -prologepilog -branch-folder -tailduplication -machine-cp > -postrapseudos -machinedomtree -machine-loops -post-RA-sched > -gc-analysis -machine-block-freq -block-placement2 -machinedomtr...

...-callsite-splitting-ipsccp -codegenprepare -consthoist -dead-mi-elimination -detect-dead-lanes -early-ifcvt -early-machinelicm -early-tailduplication -expandmemcmp -greedy -interleaved-access -iv-users -lazy-block-freq-opt-remark-emitter -livedebugvars -liveintervals -liveregmatrix -livestacks -livevars -loop-reduce -loop-simplify-lcssa-verification -lrshrink -machine-block-freq -machine-combiner -machine-cp -machine-cse -machinedomtree-machine-loops -machinelicm -machine-loops -machinepostdomtree -machinepostdomtree-block-placement -machine-scheduler -machine-sink -machi...

...ion >> >> -expandmemcmp >> >> -greedy >> >> -interleaved-access >> >> -iv-users >> >> -lazy-block-freq-opt-remark-emitter >> >> -livedebugvars >> >> -liveintervals >> >> -liveregmatrix >> >> -livestacks >> >> -livevars >> >> -loop-reduce >> >> -loop-simplify-lcssa-verification >> >> -lrshrink >> >> -machine-block-freq >> >> -machine-combiner >> >> -machine-cp >> >> -machine-cse >> >> -machin...

...users -loop-reduce -lowerinvoke -unreachableblockelim -codegenprepare -stack-protector -machine-function-analysis -machinedomtree -machine-loops -machinelicm -machine-sink -unreachable-mbb-elimination -livevars -phi-node-elimination -twoaddressinstruction -liveintervals -simple-register-coalescing -livestacks -virtregmap -linearscan-regalloc -stack-slot-coloring -prologepilog -machinedomtree -machine-loops -machine-loops I'm sure I can hack away to manually add these passes, but I'd prefer an informed opinion on the best way to achieve this, or if there's a more proper way to achieve the sa...

Hi, On 12/06/12 13:09, Abdul Wahid Memon wrote: > Thanks alot. How can we view those optimization which are enabled when we do > > llc -O3 comb.ll llc -O3 comb.ll -debug-pass=Arguments > > Are these the same as the ones produced by the following command line no, as I mentioned before they are of a completely different nature to the optimizations that opt does. Ciao, Duncan.

Thanks alot. How can we view those optimization which are enabled when we do llc -O3 comb.ll Are these the same as the ones produced by the following command line llvm-as < /dev/null | opt -O3 -disable-output -debug-pass=Arguments Regards Shahzad On Tue, Jun 12, 2012 at 1:01 PM, Duncan Sands <baldrick at free.fr> wrote: >> Yes. But how exactly code generation (optimized one)

...users -loop-reduce -lowerinvoke -unreachableblockelim -codegenprepare -stack-protector -machine-function-analysis -machinedomtree -machine-loops -machinelicm -machine-sink -unreachable-mbb-elimination -livevars -phi-node-elimination -twoaddressinstruction -liveintervals -simple-register-coalescing -livestacks -virtregmap -linearscan-regalloc -stack-slot-coloring -prologepilog -machinedomtree -machine-loops -machine-loops > > I'm sure I can hack away to manually add these passes, but I'd prefer an informed opinion on the best way to achieve this, or if there's a more proper way to achie...

...(llvm::TargetRegisterClass const*, llvm::TargetRegisterClass const*)", referenced from: (anonymous namespace)::MachineCSE::PerformTrivialCoalescing(llvm::MachineInstr*, llvm::MachineBasicBlock*) in libLLVMCodeGen.a(MachineCSE.cpp.o) llvm::LiveStacks::getOrCreateInterval(int, llvm::TargetRegisterClass const*)in libLLVMCodeGen.a(RegAllocLinearScan.cpp.o) llvm::InstrEmitter::EmitCopyFromReg(llvm::SDNode*, unsigned int, bool, bool, unsigned int, llvm::DenseMap<llvm::SDValue, unsigned int, llvm::DenseMapInfo<llvm::SDValue>, llvm::Den...